VLSI Testing
Instructor
- Professor James Chien-Mo Li
- Lab of Dependable Systems
- Graduate Institute of Electronics Engineering (GIEE)
- Department of Electrical Engineering
- National Taiwan University
Course Information
- Graduate-level course for EDA group
Lecture Notes
Chapter Topic LectureNotes 1 Introduction zip 2 Logic Simulation zip 3 Fault Models zip 4 Fault Collapsing zip 5 Fault Simulation zip 6 Testability Measure zip 7 Combinational ATPG zip 8 Sequential ATPG zip 9 Delay Test zip 10 Diagnosis zip 11 Design for Testability (I) zip 12 Design for Testability (II) zip 13 Built-in Self Test (I) zip 14 Built-in Self Test (I) zip 15 Test Compression zip 16 Memory Test zip 17 Functional Test zip 18 Advanced Topics zip Video
- Course materials are available on Youtube https://youtu.be/nX0XCD0ggHs Click here
Textbook
L.T. Wang, C.W. Wu, and X. Wen, “VLSI Test Principles and Architectures”, Morgan Kaufmann, 2006. 
Dedication
This course is dedicated to late Stanford Prof. Edward J. McCluskey, a great pioneer and educator in testing. 
last updated Feb. 2023
we have
visitors since 2019
- Professor James Chien-Mo Li