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VLSI Testing


Instructor

     Professor James Chien-Mo Li
     Lab of Dependable Systems
     Graduate Institute of Electronics Engineering (GIEE)
     Department of Electrical Engineering
     National Taiwan University

Course Information

     Graduate-level course for EDA group

Lecture Notes

Chapter Topic LectureNotes
1 Introduction rar
2 Logic Simulation rar
3 Fault Models rar
4 Fault Collapsing rar
5 Fault Simulation rar
6 Testability Measure rar
7 Combinational ATPG rar
8 Sequential ATPG rar
9 Delay Test rar
10 Diagnosis rar
11 Design for Testability (I) rar
12 Design for Testability (II) rar
13 Built-in Self Test (I) rar
14 Built-in Self Test (I) rar
15 Test Compression rar
16 Memory Test rar
17 Functional Test rar

Video

      Course materials are available on Youtube https://youtu.be/nX0XCD0ggHs Click here

Textbook

L.T. Wang, C.W. Wu, and X. Wen, “VLSI Test Principles and Architectures”, Morgan Kaufmann, 2006. Photograph

Dedication

This course is dedicated to late Stanford Prof. Edward J. McCluskey, a great pioneer and educator in testing. Photograph

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