Model { Name "block320" Version 4.00 SampleTimeColors off LibraryLinkDisplay "none" WideLines on ShowLineDimensions off ShowPortDataTypes off ShowStorageClass off ExecutionOrder off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off Created "Sat Mar 08 20:37:39 2003" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "Feng-Li Lian" ModifiedDateFormat "%" LastModifiedDate "Sat Mar 08 20:46:31 2003" ModelVersionFormat "1.%" ConfigurationManager "None" SimParamPage "Solver" StartTime "0.0" StopTime "999999" SolverMode "SingleTasking" Solver "ode45" RelTol "1e-3" AbsTol "1e-6" Refine "10" MaxStep "auto" MinStep "auto" MaxNumMinSteps "-1" InitialStep "auto" FixedStep "auto" MaxOrder 5 OutputOption "RefineOutputTimes" OutputTimes "[]" LoadExternalInput off ExternalInput "[t, u]" SaveTime off TimeSaveName "tout" SaveState off StateSaveName "xout" SaveOutput off OutputSaveName "yout" LoadInitialState off InitialState "xInitial" SaveFinalState off FinalStateName "xFinal" SaveFormat "Array" LimitDataPoints off MaxDataPoints "1000" Decimation "1" AlgebraicLoopMsg "warning" MinStepSizeMsg "warning" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" InheritedTsInSrcMsg "warning" SingleTaskRateTransMsg "none" MultiTaskRateTransMsg "error" IntegerOverflowMsg "warning" CheckForMatrixSingularity "none" UnnecessaryDatatypeConvMsg "none" Int32ToFloatConvMsg "warning" InvalidFcnCallConnMsg "error" SignalLabelMismatchMsg "none" LinearizationMsg "none" VectorMatrixConversionMsg "none" SfunCompatibilityCheckMsg "none" BlockPriorityViolationMsg "warning" ArrayBoundsChecking "none" ConsistencyChecking "none" ZeroCross on Profile off SimulationMode "normal" RTWSystemTargetFile "grt.tlc" RTWInlineParameters off RTWRetainRTWFile off RTWTemplateMakefile "grt_default_tmf" RTWMakeCommand "make_rtw" RTWGenerateCodeOnly off TLCProfiler off TLCDebug off TLCCoverage off AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off ExtModeMexFile "ext_comm" ExtModeBatchMode off ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on OptimizeBlockIOStorage on BufferReuse on ParameterPooling on BlockReductionOpt on RTWExpressionDepthLimit 5 BooleanDataType off BlockDefaults { Orientation "right" ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } System { Name "block320" Location [79, 149, 674, 487] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" ZoomFactor "100" ReportName "simulink-default.rpt" Block { BlockType SubSystem Name "Double\n integrator" Ports [1, 2] Position [260, 132, 290, 183] DropShadow on ShowPortLabels off TreatAsAtomicUnit off RTWSystemCode "Auto" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" System { Name "Double\n integrator" Location [425, 467, 618, 623] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" ZoomFactor "100" Block { BlockType Inport Name "in_1" Position [30, 60, 50, 80] Port "1" LatchInput off Interpolate on } Block { BlockType Integrator Name "x5" Ports [1, 1] Position [125, 60, 145, 80] ExternalReset "none" InitialConditionSource "internal" InitialCondition "0" LimitOutput off UpperSaturationLimit "inf" LowerSaturationLimit "-inf" ShowSaturationPort off ShowStatePort off AbsoluteTolerance "auto" } Block { BlockType Integrator Name "x6" Ports [1, 1] Position [80, 60, 100, 80] ExternalReset "none" InitialConditionSource "internal" InitialCondition "0" LimitOutput off UpperSaturationLimit "inf" LowerSaturationLimit "-inf" ShowSaturationPort off ShowStatePort off AbsoluteTolerance "auto" } Block { BlockType Outport Name "out_1" Position [170, 60, 190, 80] Port "1" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType Outport Name "out_2" Position [170, 100, 190, 120] Port "2" OutputWhenDisabled "held" InitialOutput "[]" } Line { SrcBlock "in_1" SrcPort 1 DstBlock "x6" DstPort 1 } Line { SrcBlock "x6" SrcPort 1 Points [0, 0] Branch { DstBlock "x5" DstPort 1 } Branch { Points [0, 40] DstBlock "out_2" DstPort 1 } } Line { SrcBlock "x5" SrcPort 1 DstBlock "out_1" DstPort 1 } } } Block { BlockType DiscreteFilter Name "Huc" Position [75, 131, 135, 169] BackgroundColor "magenta" DropShadow on ShowName off Numerator "[2]" Denominator "[1 1]" SampleTime "1" Realization "auto" RTWStateStorageClass "Auto" } Block { BlockType DiscreteFilter Name "Hy" Position [235, 250, 295, 290] Orientation "left" BackgroundColor "magenta" DropShadow on ShowName off Numerator "[4 -2]" Denominator "[1 1]" SampleTime "1" Realization "auto" RTWStateStorageClass "Auto" } Block { BlockType Step Name "Step" Position [20, 140, 40, 160] DropShadow on ShowName off Time "0" Before "0" After "1" SampleTime "-1" VectorParams1D on } Block { BlockType Sum Name "Sum" Ports [2, 1] Position [175, 144, 200, 171] BackgroundColor "magenta" DropShadow on ShowName off IconShape "rectangular" Inputs "+-" SaturateOnIntegerOverflow on } Block { BlockType Terminator Name "Terminator" Position [315, 160, 335, 180] ShowName off } Block { BlockType Outport Name "y" Position [415, 135, 435, 155] Port "1" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType Outport Name "uc" Position [155, 85, 175, 105] Port "2" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType Outport Name "u" Position [320, 85, 340, 105] Port "3" OutputWhenDisabled "held" InitialOutput "[]" } Line { SrcBlock "Double\n integrator" SrcPort 2 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "Step" SrcPort 1 Points [0, 0] Branch { Points [10, 0; 0, -55] DstBlock "uc" DstPort 1 } Branch { DstBlock "Huc" DstPort 1 } } Line { SrcBlock "Sum" SrcPort 1 Points [0, 0] Branch { Points [25, 0; 0, -65] DstBlock "u" DstPort 1 } Branch { DstBlock "Double\n integrator" DstPort 1 } } Line { SrcBlock "Double\n integrator" SrcPort 1 Points [0, 0] Branch { DstBlock "y" DstPort 1 } Branch { Points [65, 0; 0, 125] DstBlock "Hy" DstPort 1 } } Line { SrcBlock "Hy" SrcPort 1 Points [-80, 0; 0, -105] DstBlock "Sum" DstPort 2 } Line { SrcBlock "Huc" SrcPort 1 DstBlock "Sum" DstPort 1 } } }