Professor Chung-Yang (Ric) Huang received his B.S. degree from Department of Electrical Engineering, National Taiwan University (NTUEE), in 1992. He obtained his PhD from Department of Electrical and Computer Engineering, University of California at Santa Barbara, in 2000. Before joining NTUEE as an assistant professor in 2004, he was with Cadence Design Systems, where he served as a senior R&D manager and was in charge of the core engine development of their functional verification tools.

Professor Huang’s research interests include (1) design verification for SoCs, (2) design for verifiability, (3) design automation and optimization, and (4) constraint satisfaction problems in electronic design automation (EDA) area.

For those new and prospective graduate students looking for an advisor, or undergraduate students who are interested in design verification projects, please refer to the information in this web site. You are also very welcome to talk to Professor Huang for more details.

(For more information, please visit

http://dvlab.ee.ntu.edu.tw

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(Last modified: 11/16/2007)