On-going:
Ø
電子系統階層之正規模型與最佳化研究 (Formal
Modeling and Verification of Electronics System Level Designs) / 思源科技, 2007/03
~ 2008/02 (abstract)
Ø
正規驗證輔助電路最佳化
(Formal-Assisted Technology Dependent Logic Optimization) / 思源科技, 2007/01
~ 2008/03 (abstract)
Ø
低溫多晶矽數位電路元件資料庫之建立與驗證 (Cell
Library Construction and Verification for LTPS-TFT Digital Circuits) / 友達光電公司, 2006/07
~ 2008/06 (abstract)
Ø
N-MoIP: 適用於異質無線網路環境之前瞻MoIP 手持裝置SoC 設計 (N-MoIP:
SoC Design of Advanced Multimedia-over-IP Handheld Device for Heterogeneous
Wireless Network Environments) / 國科會國家型SoC計畫, 2005/11
~ 2009/07 (abstract/摘要)
Ø
兆級晶片系統前瞻技術研究-子計畫七:兆級晶片系統模擬與正規驗證之整合技術
(Combining Simulation and Formal Verification Techniques for
Trillion-transistor-Scale System-on-Chip (TS-SoC)) / 國科會整合型計劃, 2005/08
~ 2008/07 (abstract/摘要)
Completed:
Ø
FSTA:正規靜態時序分析技術 (FSTA :
Formal Static Timing Analysis Techniques) / 國科會個人型計畫, 2006/08
~ 2007/07 (abstract/摘要)
Ø
晶片系統智財彙集驗證及介面整合實驗計畫
(Multimedia IP qualification and verification project) / 經濟部科專計畫, 2004/04
~ 2007/03 (paper)
Ø
Data Structure and Programming (S’08)
Ø
Computer-aided VLSI System Design (S07)
Ø
Introduction to Computers (S’05)
Ø
Lab website: Design
Verification Team / Lab of Dependable Systems (3)
Ø
PTT: NTUGIEE_ric
Ø
EDA group,
GIEE, NTU
Ø
Research
introduction (EDA 招生說明會
Ø
Research
introduction (GIEE video,
Ø
黃鐘揚教授
EDA 組招生說明會錄影 (2005)