¹q¤l©ÒEDA²Õ±MÃD°Q½× (GIEE/EDA Seminar)

96 ¾Ç¦~¤W¾Ç´Á¬ã¨s©Ò¥²×½Òµ{ 901 10210 (¬y¤ô¸¹ 16170)

Announcement: 12-03-2007

1. There will be NO seminar on 12/31!! Happy new year!!

2. ½ÐÀH®Éª`·N¯Ê®u¬ö¿ý, ¦p¦³ºÃ°Ý, ½Ð©ó¤@¶g¤º¸ò§Ú¤ÏÀ³, ¹O®É¤£¨ü²z.

3. If you are a CS-group student and would like to attend the EDA seminar, ½Ð¥H¹êÅç«Ç¬°³æ¦ì±H¤@¥÷¦W³æµ¹§Ú. Of course, you should register to the CS group seminar, not EDA. I will share this list with the CS group seminar host, Prof. JL Huang, for the final grade.

4. Please note: the seat you take on 09/29 will be your seat for the rest of the semester. So if you like to have your own choice of seat, please come earlier. Please also note that some of the seats will be blocked or reserved. Please watch out for the updated seat map later.

Instructor:

Prof. ¶ÀÄÁ´ Chung-Yang (Ric) Huang, Department of Electrical Engineering
Office hours: Stop by or (better) by e-mail appointment
Office: EE Building II, Room 444
Phone: 3366-3644
Email: ric@cc.ee.ntu.edu.tw

URL: http://cc.ee.ntu.edu.tw/~ric, http://dvlab.ee.ntu.edu.tw

Time:

Monday 3:30 ¡V 4:20pm

Location:

BL 112

Grading: Pass/no pass

Class Rules:

1. ¤@ÓÅÚµÔ¤@Ó§|: ½Ð¨Ì®y¦ìªí¤J®y.

2. ¤T®¶¥X§½: ¤@¾Ç´Á¥i¥H¯Ê®u¨â¦¸, ¦ý¬O²Ä¤T¦¸¯Ê®u´Nª½±µ¦A¨£, ¨S¦³²z¥Ñ.

3. ¥N¥´ªÌ»P³Q¥N¥´ªÌ¬Ò¥X§½: ¤£n§ä§O¤H¥NÂI¦W, ¹HªÌª½±µ¦A¨£, ¨S¦³²z¥Ñ.

4. ·Ç®É¤J³õ: ¶}³õ«á5¤ÀÄÁ½Ð¤Å¤J³õ, ¹HªÌµø¬°¯Ê®u°O¦n²y¤@¦¸, ¨S¦³²z¥Ñ.

5. OMGIS: ¦³¨Æn½Ð°², ½Ð¦b¬P´Á¤Ñ6pm¤§«e¼ge-mail§i¶D§Ú, «e¤T¦¸¥i¥H¥un²z¥Ñ¤£¥ÎÃÒ©ú, °£¦¹¤§¥~ (§tÁ{®É½Ð°²), ¥i¥H¤£¥Îµ¹²z¥Ñ¦ý¬On¥¿¦¡©Î«ü¾É±Ð±Âªºµý©ú, ¹HªÌµø¬°¯Ê®u°O¦n²y¤@¦¸, ¨S¦³²z¥Ñ.

¯Ê®u°O¿ý:

Ø 10/15: D92921012(1), R95943080(1), D94943014(1), R95943157(1), R94943159(1), R95943158(1)

Ø 10/22: R95943161(1), D94943036(1), D94943038(1)

Ø 10/29: P95943014(1), R94943101(1)

½Ð°²°O¿ý: (* ¬°¦³½Ð°²³æªÌ, ¥i¤£p¦bOMGIS rule¤¤ªº¤T¦¸½Ð°²)

Ø 09/29: D92921012, D96943042, F92921104, F95943077

Ø 10/01: F93943028, R95943075, R95943079, R96943109(*)

Ø 10/08: D96943042, R95943070

Ø 10/15: D94943035, R95943164, R95943073(*), R95943159(*)

Ø 10/22: D92943016, R94943153, R95921026, R95943084

Ø 10/29: D94943037, D94943039, D96943041(*)

Ø 11/05: D94943038, D94943039(*), F92921104(*), F92943033(*), F93943028(*), F94943075(*), R95921033(*), R95943073(*), R95943078(*), R95943084(*), R95943159(*), R96943067(*), R96943074(*)

Ø 11/12: D93943021, F92943033, F93921045, F93943028, R94943101(?), R95921033, R95943073, R95943159, R95943164 (2), R96943066(?), R96943074

Ø 11/19: D92943016, D94943038(2), F94943076, P95943014, R95943102, R96943121

Ø 12/03: D93943021(2), F93921045(2), F94943076,

Ø 12/10: D94943037(2), D95921036, F93943028, F93921045(3), F94921096, F95943077, P95943014, R95921039, R95943081, R95943159, R96921031, R96943109

Ø 12/17: D92921012, D94943014, D96943038, F94921096, P95943014, R95943075, R95943079

Ø 12/24: R95943076, R95943080, R95943157

Ø 01/07: D96943041, F95943077, R94943159, R95921039, R95943079, R96943114

CS to EDA seminar student list: (¨S¦³§i¶D§Úªº¥i¯à·|¨S¦³¦¨ÁZ¡K)

Ø EDA Lab: R96921031, R96921058, R95921039

Ø LaDS3: F92921089, F93943122, R95921028, R95921029, D95921036, R95921026, R95921121, R96921034

Ø LaDS1: R95921033

Lecture schedule:

	Date	Speaker (Affiliation)	Title	Links
1	09/17	Prof. Igor Markov (U. Michigan)	High-performance Routing at the Nanometer Scale	abstract & bio
2	09/29	Prof. Igor Markov (U. Michigan)	Debugging digital circuits: RTL, gate-level and post-silicon	abstract & bio
3	10/01	Dr. Sakir Sezer (Queens Univ., NI)	Research Challenges in High-performance Network Processing Circuits and Systems	abstract & bio
4	10/08	Prof. Igor Markov (U. Michigan)	Why Study Quantum Circuits and What They Are Good For	abstract & bio
5	10/15	´¶¦w¬ì§Þ RD°ÆÁ` ¥]±RµØ	ªï±µµLÀx¦sªº®É¥N--½ÍÀx¦s§Þ³N/¸ê®Æ«OÅ@ªº¤¶²Ð»PÀ³¥Î	abstract
6	10/22	¥x¿n¹qDFM Sr. Mgr¾G»ö¨Ô ³Õ¤h	Integrated Design-for-Manufacturing (DFM) Solutions	abstract & bio
7	10/29	SpringSoft¥Õ¿üÂE ¸ê²`³Bªø	Topic: Next Generation Analog and Mixed Signal Design Solution (Note: Recruiting session after the talk)
8	11/05	1. Éi¥õ¤s (Prof. SJ Chen) 2. Ahmet Gurhanli (Prof. CP Chen)	1. Local Fix Based Litho-Compliance Layout Modification in Router 2. Design of a RISC processor compatible with ARM instructions
9	11/12	¥x¿n¹q §õ¤å´Ü ³Bªø	Future of Foundry Industry - Technology and Circuit Co-optimization	abstract
10	11/19	1. ¤ý¶§ªQ (Prof. SY Kuo) 2. ¹ù¥ú¸U (Prof. YW Chang)	1. Activity Based High Level Modeling of Dynamic Switching Currents in Digital IC Modules 2. Lithography-Aware Routing with Predictive OPC Formulae
11	11/26	Midterm exam	Midterm exam
12	12/03	Prof. Tian-Li Yu (NTU)	Evolution, Genetic Algorithm, and Problem Decomposition
13	12/10	Naresh Shanbhag (UIUC)	EDA Challenges in the Nanoscale Era	abstract & bio
14	12/17	³Ð·N¹q¤l ³¯«Ø¨}³Bªø	(TBD: ESL related topic)
15	12/24	®v¥Í®y½Í	¥X®u±Ð±Â: ±iÄ£¤å, ³¯¤¤¥, §õ«Ø¼Ò, ¶À«T¦, ¶ÀÄÁ´
16	12/31	Happy New Year!!	Happy New Year!!
17	01/07	Richard Lee, Sr. Technical Marketing in Cadence Taiwan	RF/Mixed Signal Design Challenges
18	01/14	Final Week

¡P ¹êÅç«Ç³ø§i:

1. ¶¶§Ç (¥H«ü¾É±Ð±Â©m¦W): (1) Prof. SJ Chen, (2) Prof. CP Chen, (3) Prof. SY Kuo, (4) Prof. YW Chang, (5) Prof. JL Huang, (6) Prof. Ric Huang, (7) Prof. CM Li, (8) Prof. HC Lu, (9) Prof. TC Lee, (10) Prof. Farn Wang, (11) Prof. JH Jiang.

2. ¤@¬P´Á¨â²Õ, ¨C²Õ25¤ÀÄÁ, ¤¤^¤å¬Ò¥i, ½Ð¹êÅç«Ç¦Û¦æ±À¬£¥Nªí.

3. ¥H¤À¨É¹êÅç«Ç¬ã¨s¦¨ªG¬°¥D, ½Ð¦b¤@Ó§«ô¤§«e±Hµ¹Prof. Ric HuangÃD¥Ø»P¤jºõ, ¨Ã¦bºtÁ¿§¹²¦«á´£¨Ñ§ë¼v¤ù.

¡P No seminar class in the final week (01/14)

®y¦ìªí:

Older announcements:

1. No class on 09/24 (¤¤¬î¸`); Make-up class on 09/29 (Saturday). Prof. Igor Markov will give a talk on ¡§design debugging¡¨.

2. The slides for the 09-17 Prof. Markov¡¦s talk can be download from the link of the schedule table.