Graduate Students

Graduate Students (last update: October 2006)

博士生 Ph.D. Students
1. 陳泰蓁 Tai-Chen Chen (2001-present, Graduate Institute of Electronics Engineering, NTU)
  Dissertation directions: Gridless routing considering nanometer electrical effects
2. 方宇綸 Athena Yu-Luen Fang (2003-present, Graduate Institute of Electronics Engineering, NTU)
  Dissertation directions: Floorplanning
3. 喻秉鴻 (2003-present, Graduate Institute of Computer Science and Information Engineering, NTU; co-supervised with Prof. Chia-Lin Yang)
  Dissertation directions: Floorplanning/placement for emerging technologies (reconfigurable systems, bio-chips, etc)
4. 陳東傑 Tung-Chieh Chen (2004-present, Graduate Institute of Electronics Engineering, NTU)
  Dissertation directions: Floorplanning and placement for large-scale circuits
5. 江哲維 Zhe-Wei Jiang (2004-present, Graduate Institute of Electronics Engineering, NTU)
  Dissertation directions: Large-scale mixed-size placement and reliability
6. 李婉萍 Wan-Ping Li (2004-present, Graduate Institute of Electronics Engineering, NTU)
  Dissertation directions: Low-power design methodology for multiple supply/threshold voltages
7. 廖光萬 Guang-Wan Liao (2004-present, Graduate Institute of Electronics Engineering, NTU)
  Dissertation directions: Design for manufacturing
8. 方家偉 Jai-Wei Fang (2005-present, Graduate Institute of Electronics Engineering, NTU)
  Dissertation directions: Routing for flip chips and PCB's
9. 陳皇宇 Huan-Yu Chen (2005-present, Graduate Institute of Electronics Engineering, NTU)
  Dissertation directions: Manufacturing-aware Routing for large-scale circuits
10. 林依潔 I-Jye Lin (2005-present, Graduate Institute of Electrical Engineering, NTU)
  Dissertation directions: Statistical design optimization and design for manufacturing
11. 林柏宏 Mark Lin (2005-present, Graduate Institute of Electronics Engineering, NTU)
  Dissertation directions: Analog layout designs
12. 許欽雄 Chin-Hsiung Hsu (2006-present, Graduate Institute of Electronics Engineering, NTU)
碩士生 M.S. Students
1. 林忠緯 Chung-Wei Lin (2005-present, Graduate Institute of Electronics Engineering, NTU)
  Dissertation directions: Stenier-tree optimization with obstacles
2. 周思睿 Szu-Jui Chou (2005-present, Graduate Institute of Electronics Engineering, NTU)
  Dissertation directions: CMP-aware routing
3. 劉宏毅 Hung-Yi Liu (2005-present, Graduate Institute of Electronics Engineering, NTU)
  Dissertation directions: Power and timing optimization for multiple supply voltages
4. 陳信成 Hsin-Chen Chen (2005-present, Graduate Institute of Electrical Engineering, NTU)
  Dissertation directions: Macro placement for large-scale mixed-size circuits
5. 李奇峰 Chi-Fang Lee (2005-present, Graduate Institute of Computer Science and Information Engineering, NTU; co-supervised with Prof. Chia-Lin Yang)
  Dissertation directions: Leakage power optimization
6. 黃士倫 (2006-present, Graduate Institute of Electronics Engineering, NTU)
7. 李孟祥 (2006-present, Graduate Institute of Electronics Engineering, NTU)
8. 莊易霖 (2006-present, Graduate Institute of Electronics Engineering, NTU)
9. 許凱琪 (2006-present, Graduate Institute of Electrical Engineering, NTU)
10. 陳思佑 (2007-present, Graduate Institute of Electronics Engineering, NTU)
11. 徐孟楷 (2007-present, Graduate Institute of Electronics Engineering, NTU)
12. 鄭仲鈞 (2007-present, Graduate Institute of Electronics Engineering, NTU)
13. 高新綸 (2007-present, Graduate Institute of Electrical Engineering, NTU)
碩士在職生 On-Job M.S. Students
1. 李雅菁 Jocelyn Lee (2004-present, Graduate Institute of Electronics Engineering, NTU)
2. 翁琳妮 Lannie Weng (2005-present, Graduate Institute of Electronics Engineering, NTU)
3. 王有成 Yu-Chen Louis Wang (2005-present, Graduate Institute of Electronics Engineering, NTU)
4. 邱勝豐 Sheng-Feng Sam Chiu (2006-present, Graduate Institute of Electronics Engineering, NTU)
5. 湯志賢 Nail Tang (2006-present, Graduate Institute of Electrical Engineering, NTU)
畢業校友 Alumni/Alumnae
- 博士 Ph.D.
  1. 吳光閔 Guang-Ming Wu (1997-2000, Dept. of Computer & Information Science, NCTU)
    Dissertation: Architectures and CAD algorithms for dynamically reconfigurable FPGAs
  2. 林家民 Jai-Ming Lin (1998-2002, Dept. of Computer & Information Science, NCTU)
    Dissertation: Transitive closure graph representation for general floorplans
  3. 江蕙如 Hui-Ru Jiang (1998-2002, Dept. of Electronics Engineering, NCTU, co-supervised with Prof. Jing-Yang Jou)
    Dissertation: Interconnect optimization for deep-submicron technologies
  4. 何宗易 Chung-Yi Ho (2001-2005, Graduate Institute of Electrical Engineering, NTU, co-supervised with Prof. Sao-Jie Chen)
    Dissertation: mSIGMA: A multilevel full-chip routing system considering SIGnal-integrity and MAnufacturability
- 碩士 M.S.
  1. 張裕東 Yu-Dong Chang (1996-1998, Dept. of Computer and Information Science, NCTU)
    Thesis title: Design and Analysis of Universal Switch Blocks for Hierarchical FPGAs
  2. 林家民 Jai-Ming Lin (1997-1998, Dept. of Computer and Information Science, NCTU)
    Thesis title: Matching-Based Algorithms for FPGA Segmentation Design
  3. 王成瑄 Cherng-Shiuan Wang (1997-1999, Dept. of Computer and Information Science, NCTU)
    Thesis title: Implementation of a Timing-driven router for FPGAs
  4. 徐國程 Michael Shyu (1997-1999, Dept. of Computer and Information Science, NCTU)
    Thesis title: Generic Universal Switch Blocks
  5. 張育蒼 Yu-Tsang Chang (1997-1999, Dept. of Computer and Information Science, NCTU)
    Thesis title: Architecture-driven Simultaneous Placement and Global-routing for FPGAs
  6. 薛文皓 Wen-Hao Shiue (1997-1999, Dept. of Computer and Information Science, NCTU)
    Thesis title: Sequence-pair Based Floorplanning
  7. 謝孟桓 Meng-Huang Shieh (1997-1999, Dept. of Computer and Information Science, NCTU)
    Thesis title: Crosstalk Minimization for Gridless Channel Routing
  8. 張雲智 Yun-Chih Chang (1998-2000, Dept. of Computer and Information Science, NCTU)
    Thesis title: B*-trees: A new representation for non-slicing floorplans
  9. 潘頌睿 Song-Ra Pan (1998-2000, Dept. of Computer and Information Science, NCTU)
    Thesis title: interconnect optimization for deep submicron
  10. 趙家佐 Chia-Tsao Chao (1998-2000, Dept. of Computer and Information Science, NCTU)
    Thesis title: A probability-based approach partitioning algorithm for time-multiplexed FPGAs
  11. 張家源 Chia-Yuan Chang (1998-2000, Dept. of Computer and Information Science, NCTU)
    Thesis title: Formulae for performance optimization with applications to interconnect-driven floorplanning
  12. 衣懷恩 Huai-En Yi (1999-2001, Dept. of Computer and Information Science, NCTU)
    Thesis title: Placement with the boundary constraint using B*-tree
  13. 陳泰蓁 Tai-Chen Chen (1999-2001, Dept. of Computer and Information Science, NCTU)
    Thesis title: Performance-driven modeling and optimization under the transmission-line delay model
  14. 李訓政 Shun-Cheng Li (1999-2001, Dept. of Computer and Information Science, NCTU)
    Thesis title: Multilevel large-scale module floorplanning/placement
  15. 李淑敏 Shu-Min Li (1999-2001, Dept. of Computer and Information Science, NCTU)
    Thesis title: Noise-aware buffer-block planning for interconnect-driven floorplanning
  16. 涂尚瑋 Shang-Wei Tu (2000-2001; Dept. of Electronics Engineering, NCTU, co-supervised with Prof. and Dean Wen-Zen Shen)
    Thesis title: On-chip inductance modeling for the coplanar structure
  17. 吳素緯 Shu-Wei Wu (碩士專班, 1999-2002, NCTU)
    Thesis title: Fast power/ground distribution network synthesis for signal integrity-driven floorplanning
  18. 陳信隆 Hsin-Lung Chen (2000-2002, Dept. of Computer and Information Science, NCTU)
    Thesis title: Temporal floorplanning using 3D-subTCG
  19. 程益輝 Yi-Hui Cheng (2000-2002, Dept. of Computer and Information Science, NCTU)
    Thesis title: Integrating buffer planning with floorplanning for simultaneous area, timing, noise, and congestion optimization
  20. 林世平 Shih-Ping Lin (2000-2002, Dept. of Computer and Information Science, NCTU)
    Thesis title: A novel framework for multilevel routing considering routability and performance
  21. 吳孟臻 Mong-Jang Wu (2001-2003, NCTU)
    Thesis title: Placement with an optimal evaluation scheme for alignment and performance constraints
  22. 王聖龍 Sheng-Long Wang (2001-2003, Graduate Institute of Electronics Engineering, NTU)
    Thesis title: Accurate delay modeling for buffered RLY/RLC trees
  23. 彭志洋 Chih-Yang Peng (2001-2003, Graduate Institute of Electronics Engineering, NTU)
    Thesis title: Block and input/output buffer placement in flip-chip design
  24. 楊士賢 Shih-Shyan Yang (2001-2003, Graduate Institute of Electronics Engineering, NTU)
    Thesis title: Simultaneous floorplanning and power/ground network synthesis
  25. 林宜偉 Yi-Wei Lin (2002-2004, Graduate Institute of Electronics Engineering, NTU)
    Thesis title: Thermal-driven Interconnect Optimization by Simultaneous Gate and Wire Sizing
  26. 林容正 Jung-Cheng Lin (2002-2004, Graduate Institute of Electronics Engineering, NTU)
    Thesis title: Floorplan and Power/Ground Network Co-synthesis
  27. 陳聖丰 Sheng-Fong Chen (2002-2004, Graduate Institute of Electronics Engineering, NTU)
    Thesis title: Performance-Driven Routing-Tree Construction with Obstacle Consideration
  28. 趙文璋 Wen-Chang Chao (2002-2004, Graduate Institute of Electronics Engineering, NTU)
    Thesis title: Performance-Driven Block and Input/Output Buffer Placement in Flip-Chip Design
  29. 賴俊穎 Chung-Ying Lai (2002-2004, Graduate Institute of Communication Engineering, NTU; co-supervised with Prof. Shyh-Kang Jeng)
    Thesis title: Surface Integral Inductance Extraction for General Interconnect Structures
  30. 方家偉 Jai-Wei Fang (2003-2005, Graduate Institute of Electronics Engineering, NTU)
    Thesis title: An RDL Routing System for Flip-Chip Design
  31. 劉振偉 Cheng-Wei Liu (2003-2005, Graduate Institute of Electronics Engineering, NTU)
    Thesis title: Floorplan and Power/Ground Network Co-Synthesis for Fast Design Convergence
  32. 吳彥緯 (2003-2005, Graduate Institute of Computer Science and Information Engineering, NTU; co-supervised with Prof. Chia-Lin Yang)
    Thesis title: XRoute: A Novel X-Architecture Multilevel Full-Chip Router
  33. 張宸峰 Chen-Feng Chang (2003-2006, Double major; also in Education, Graduate Institute of Electrical Engineering, NTU)
    Thesis title: XRoute: An X-Architecture Full-Chip Router Based on a Novel Multilevel Framework
  34. 蔣梅芳 (2004-2006, Graduate Institute of Electrical Engineering, NTU)
    Thesis title: Post-layout Double-via Insertion for Yield Enhancement
  35. 林翠薏 (2004-2006, Graduate Institute of Electrical Engineering, NTU)
    Thesis title: Statistical Timing- and Thermal-driven Circuit Optimization
  36. 許天彰 (2004-2006, Graduate Institute of Electronics Engineering, NTU)
    Thesis title: A Detailed placement Algorithm for Large-scale VLSI Circuits
  37. 陳彥賓 (2004-2006, Graduate Institute of Electrical Engineering, NTU)
    Thesis Title: ECO Timing Optimization Using Spare Cells and Technology Remapping