Automated Verification Lab. 

Software Testing Lab.


Farn Wang


Dept. of Electrical Engineering
National Taiwan University

BL 616, Nr.1, Sec. 4, Roosevelt Rd.
Taipei, Taiwan 106, ROC

TEL: +886-2-33663602
FAX: +886-2-23671909



1. Basic Computer Concepts

2. Compilers

3. Operating Systems
4. Software Testing



Publications       Autobiography       Projects

General Chairs:

    4th IEEE TASE, 2010

     International Conference on Theoretical Aspects of Software Engineering


    13'th ICTAC, 2016

     International Colloquium on Theoretical Aspects of Computing


Associate Editorships, International journals :

   ☼FMSD (International Journal on Formal Methods in System Design), Springer-Verlag.  (SCI extended)

Guest Editorships, International journals : 

   ☼IJFCS (International Jounral of Foundations on Computer Science),

       special-issue on ATVA 2003/2004 (SCI extended), to appear.

Guest Co-editorships, International journals : 

   ☼IJFCS, Special-issue on Verification and Analysis of Infinite-state Systems,

       Vol. 14, Nr.4, August, 2003, World Scientific Publishing Co.  (SCI extended)

Steering Committee Memberships:

   ☼ATVA [International Symposium on Automated Technology for Verification and Analysis]

Program Chairmanships:

   ☼ IEEE TASE (Theoretical Aspects of Software Engineering), 2010, Taipei, Taiwan, ROC.

      25'th IFIP FORTE (International Conference on Formal Techniques for Distributed and Communication Systems)

      September-October 2005

   ☼ 3rd ATVA, October-November 2004

Program Co-chairmanships:


   ☼ RTC'1999 (International Workshop on Real-Time Constraints)

   ☼ RTCSA'97 (International Workshop on Real-Time Computing Systems and Applications),

Program Committees:


   ☼ASP-DAC 2006

   ☼APSEC'2000, 2001, 2003, 2004


   ☼ATVA'2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014


   ☼ECRTS'2003, 2004, 2005


   ☼ICFEM'2002, 2003, 2004, 2005, 2013

   ☼IEEE RTAS'1996, 1997, 2000, 2001, 2004, 2006

   ☼IEEE RTSS'1996, 1999, 2000, 2001, 2004

   ☼RTCSA'1996, 1997, 1998, 1999, 2000, 2002, 2003, 2004, 2005

   SPIN 2013


Invited Speeches:

   ☼ATS (Asian Testing Symposium) 2013, Taiwan.

   1st Workshop on Synthesis (SYNT), July 2012, Berkeley, California.  (Slides). 

   ☼IEEE HASE'98 (High-Assurance Software Engineering).

   ☼1st IWTS (International Workshop on Specification and Verification of Timed Systems), Kyoto, Japan, March 3-5,

   ☼AVIS'2003, Warsaw, Poland

   ☼SVV'2005 (International Workshop on Software Verification and Validation), Manchester, UK


   ☼ICFEM (International Conference on Formal Engineering Methods) 2005.

   ☼FORTE 2005

   ☼ATVA 2003


  1. RED 5.0: an integrated symbolic TCTL model-checker/simulator for

with GUI, counter-example generation capability, and deadlock-detection capability. 

Reports available on CRD performance comparison (STTT, Springer-Verlag), gfp speed-up (CIAA'03, LNCS 2759, Springer-Verlag), numerical coverage (FORTE'2003, LNCS 2767, Springer-Verlag), HRD

  1. RED 4.2: a symbolic TCTL model-checker/simulator for timed automata with GUI, counter-example generation capability, and deadlock-detection capability.
  1. SGM: State-Graph Manipulators,  A User-friendly Compositional Verification Tool for real-time systems  

To the date of the last update of this page, SGM has been downloaded by more than 100 users all over the world.


  1. Slides for the model-checking lecture in FLOLAC 2009.