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(A). Journals
(B). Ph.D Dissertations
(C). Master theses


 

 

(A). Journals

Publication Lists

 

 

(B). Ph.D Dissertations  

¡ô  Subject / ¬ã¨s¥DÃD  Author / §@ªÌ  Professor / «ü¾É±Ð±Â  Date / ¤é´Á
41
 "Design and Analysis of Low-Phase-Noise 20-60MHz MEMS Oscillators"
 "§CÂø°T20-60MHz·L¾÷¹q®¶Àú¾¹³]­p»P¤ÀªR"
 Hsin-Tung Jen
 ¥ôªY®ä
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2021
 ¥Á°ê110¦~7¤ë
40
 "Design and Analysis of PAM-4 Optical Receiver Front-Ends;
 "¥|¶¥¯ß½Ä®¶´T½ÕÅÜ¥ú±µ¦¬¾¹«eºÝ¹q¸ô¤§¤ÀªR¤Î³]­p"
 Kuan-Lin Fu
 ³Å«aÀM
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2020
 ¥Á°ê 109¦~7¤ë
39
 "The Design and Implementation of the Frequency-Drift-Compensated Phase-Locked Loop"
 "¨ãÀW²vº}²¾¸ÉÀv¥\¯à¤§Âê¬Û°j¸ô³]­p»P¹ê²{"
 Cheng-En Hsieh
 ÁÂ¥¿®¦
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2019
 ¥Á°ê108¦~6¤ë
38  "Adaptive AC-DC Converters for Wireless Power Transmission"
 "À³¥Î©óµL½u¥\²v¶Ç¿éªº¥i¾A©Ê¥æ¬y-ª½¬yÂà´«¾¹"
 Ye-Sing Luo
 Ã¹·~¿³
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2017
 ¥Á°ê106¦~6¤ë
37  "Amplifier-Based Analog-to-Digital Converters Using Time-Domain Signal Processing"
 "¨Ï¥Î®É¶¡°T¸¹³B²z¤§©ñ¤j¾¹°ò·ÇÃþ¤ñ¼Æ¦ìÂà´«¾¹"
 Liang-Jen Chen
 ³¯«G¤¯
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Dec. 2015
 ¥Á°ê104¦~12¤ë
36  "Automatic Loop Gain Optimization for Digital Phase-Locked Loops"
 "¼Æ¦ìÂê¬Û°j¸ô¤§¦Û°Ê°j¸ô¼W¯q³Ì¨Î¤Æ"
 Ting-Kuei Kuan
 ºÞ®¼¶Q
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2015
 ¥Á°ê104¦~6¤ë
35  "Analysis and Design of Clock Generators in 65-nm CMOS Technology"
 "®É¯ß²£¥Í¾¹¤§¤ÀªR»P³]­p©ó65©`¦ÌCMOS§Þ³N"
 I-Ting Lee
 §õ©y®x
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2013
 ¥Á°ê102¦~1¤ë
34  "Phase-Locked Loop and Adaptive Transceiver for Multi-Channel Serial-Link Application"
 "À³¥Î©ó¦h³q¹D¦ê±µ¦¡³q°T¤§Âê¬Û°j¸ô»P¥i¾A©Ê¦¬µo¾÷"
 Shih-Yuan Kao
 °ª¥@·½
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jun. 2012
 ¥Á°ê101¦~6¤ë
33  "Analysis and Design of Injection-Locked Frequency Dividers and Phase-Locked Loops in Millimeter-Wave Bands"
 "²@¦ÌªiÀW¬qª`¤JÂê©w°£ÀW¾¹©MÂê¬Û°j¸ô¤§¤ÀªR¤Î³]­p"
 Bo-Yu Lin
 ªL¬f¦t
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2012
 ¥Á°ê101¦~1¤ë
32  "Tens-Gb/s Decision-Feedback Equalizers and Clock and Data Recovery Circuits for High-Speed Wire-Line Communications"
 "À³¥Î©ó°ª³t¦³½u³q°T¤§¼Æ¦Ê¥ü¦ì¤¸¨Mµ¦¦^±Âµ¥¤Æ¾¹¤Î®É¯ß¸ê®Æ¦^´_¹q¸ô"
 Chang-Lin Hsieh
 ÁªøÀM
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Dec. 2011
 ¥Á°ê100¦~12¤ë
31  "Design and Implementation of Low-Noise Amplifier for Wireless Communications"
 "À³¥Î©óµL½u³q°T¤§§CÂø°T©ñ¤j¾¹¤§³]­p»P¹ê§@"
 Ke-Hou Chen
 ³¯¬ì¦Z
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jul. 2011
 ¥Á°ê100¦~7¤ë
30  "Jitter-Improved Techniques for PLLs in Nanoscale CMOS Technology"
 "À³¥Î©óCMOS©`¦Ì»sµ{¤§Âê¬Û°j¸ô§Ý°Ê§ïµ½§Þ³N"
 Chao-Ching Hung
 ¬x¥ü¼y
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 May 2011
 ¥Á°ê100¦~5¤ë
29  "Design and Implementation of Pipelined ADC in CMOS Technology"
 "¾ÉºÞ¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹ªº³]­p»P¹ê²{"
 Hwei-Yu Lee
 ¾¤¼z¥É
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 May 2011
 ¥Á°ê100¦~5¤ë
28  "Design and Implementation of Phase-Locked Loops in Millimeter-Wave Bands"
 "²@¦ÌªiÀW¬qÂê¬Û°j¸ô¤§³]­p»P¹ê²{"
 Kun-Hung Tsai
 ½²©[§»
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Dec. 2010
 ¥Á°ê99¦~12¤ë
27  "Design and Analysis of Operational Amplifiers for Low Dropout Regulators and LCD Column Drivers"
 "À³¥Î©ó§CÀ£­°Ã­À£¾¹»P²G´¹Åã¥Ü¾¹¦æÅX°Ê¹q¸ô¤§¹Bºâ©ñ¤j¾¹ªº³]­p»P¤ÀªR"
 Wei-Jen Huang
 ¶À«Â¤¯
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Dec. 2010
 ¥Á°ê99¦~12¤ë
26  "Design and Implementation of Clock Generators with Charge Pump Calibration in CMOS/LTPS Technology"
 "¨Ï¥ÎCMOS»PLTPS»sµ{³]­p»P¹ê²{¨ã¦³¥R¹q¬¦®Õ¥¿¤§®É¯ß²£¥Í¾¹"
 Wei-Ming Lin
 ªL­³¦W
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2010
 ¥Á°ê99¦~7¤ë
25  "Design and Implementation of Clock Generators in Nanoscale CMOS Processes"
 "²`¦¸·L¦ÌCMOS»sµ{¤§®É¯ß²£¥Í¾¹ªº³]­p»P¹ê§@"
 Jung-Yu Chang
 ±iÂè¿Ù
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2010
 ¥Á°ê99¦~1¤ë
24  "High-Speed Analog Equalizers and Digital Near-End Crosstalk Canceller for Multi-Lane Serial-Link Receivers"
 "À³¥Î©ó¦h³q¹D¦ê±µ¦¡±µ¦¬¾÷¤§°ª³tÃþ¤ñµ¥¤Æ¾¹»P¼Æ¦ì¦¡ªñºÝ¤zÂZ®ø°£¹q¸ô"
 Jian-Hao Lu
 §f°·»¨
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Dec. 2009
 ¥Á°ê98¦~12¤ë
23  "Design of Automatic Gain Control Amplifiers and Analog to Digital Data Converters for Receiver Applications"
 "À³¥Î©ó±µ¦¬¾÷¤§¦Û°Ê¼W¯q±±¨î©ñ¤j¾¹»PÃþ¤ñ¼Æ¦ìÂà´«¾¹³]­p"
 I-Hsin Wang
 ¤ý¶h·s
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2009
 ¥Á°ê98¦~6¤ë
22  "Design and Implementation of CMOS Wide-Range Delay-Locked Loop"
 "CMOS¼eÀW©µ¿ðÂê©w°j¸ô¤§³]­p»PÀ³¥Î"
 Chao-Chyun Chen
 ³¯¶W¸s
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2008
 ¥Á°ê97¦~7¤ë
21  "Design of High Speed Delay-Locked Loops"
 "°ª³t©µ¿ðÂê¬Û°j¸ô¤§³]­p"
 Chi-Nan Chuang
 ²ø°ò¨k
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2008
 ¥Á°ê97¦~6¤ë
20  "Clock generator and burst-mode CDR for optical communications"
 "À³¥Î©ó¥ú³q°T¤§®É¯ß²£¥Í¾¹»P¬ðµo¦¡®É¯ß¸ê®Æ¦^´_¹q¸ô"
 Lan-Chou Cho
 ¨ôÁp¬w
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2008
 ¥Á°ê97¦~6¤ë
19  "Design of Broadband CMOS Circuits for UWB and High-Speed Wireline Receivers"
 "À³¥Î©ó¶W¼eÀW¤Î°ª³t¦³½u±µ¦¬¾÷¤§¼eÀWCMOS¹q¸ô"
 Chih-Fan Liao
 ¹ù¤§¦|
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2007
 ¥Á°ê96¦~7¤ë
18  "Design of High-Speed CMOS Clock Generation and Data Recovery"
 "°ª³tCMOS®É¯ß²£¥Í¤Î¸ê®Æ¦^´_¹q¸ô³]­p"
 Che-Fu Liang
 ±ç­õ¤Ò
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2007
 ¥Á°ê96¦~7¤ë
17  "CMOS High-Speed Analog Key Components for Broadband Receivers"
 "À³¥Î©ó¼eÀW±µ¦¬¾¹¤§CMOS°ª³tÃöÁä¹s²Õ¥ó"
 Chihun Lee
 §õ§Ó­i
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2007
 ¥Á°ê96¦~7¤ë
16  "Design and implementation of all-digital DLL and duty cycle corrector circuit"
 "¥þ¼Æ¦ì©µ¿ðÂê©w°j¸ô¤Î¤u§@¶g´Á­×¥¿¹q¸ô¤§³]­p»P¹ê²{"
 Shao-Ku Kao
 °ª¤Ö¨¦
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2007
 ¥Á°ê96¦~7¤ë
15  "Design and Implementation of CMOS Clock Generation and Clock/Data Recovery Circuits for Wired-Line Transceivers"
 "¹B¥Î©ó¦³½u¶Ç°e±µ¦¬¾÷¤§CMOS®É¯ß²£¥Í¤Î®É¯ß¸ê®Æ¦^´_¹q¸ôªº³]­p»P¹ê²{"
 Rong-Jyi Yang
 ·¨ºa¦N
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2006
 ¥Á°ê95¦~6¤ë
14  "Design of CMOS Inductors and Their Applications for High-speed Front-end Circuits"
 "CMOS¹q·P³]­p¤Î¨ä°ª³t«eºÝ¹q¸ôÀ³¥Î"
 Chia-Hsin Wu
 §d®aªY
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2004
 ¥Á°ê93¦~7¤ë
13  "Design and Application of CMOS Digital/Analog Delay-Locked Loops"
 "CMOS¼Æ¦ì/Ãþ¤ñ¦¡©µ¿ðÂê¬Û°j¸ô¤§³]­p»PÀ³¥Î"
 Hsiang-Hui Chang
 ±i´ð½÷
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2004
 ¥Á°ê93¦~7¤ë
12  "Analysis and Design of CMOS PWCL/DLL and PLL"
 "CMOS¯ßªi¼e«×±±¨î°j¸ôº[Âê¬Û°j¸ô¤§¤ÀªR»P³]­p"
 Sung-Rung Han
 ÁúªQ¿Ä
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2004
 ¥Á°ê93¦~7¤ë
11  "CMOS Exponential Function Ciruits and Their Applications"
 "¤¬¸É¦¡ª÷®ñ¥b³õ®Ä¹q´¹Åé«ü¼Æ¨ç¼Æ¹q¸ô¤Î¨äÀ³¥Î"
 Weihsing Liu
 ¼B°¶¦æ
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2004
 ¥Á°ê93¦~6¤ë
10  "The Design and Implementation of Low Voltage CMOS Delta Sigma Modulator"
 "§C¹qÀ£CMOS¤T¨¤¿n¤À½ÕÅܾ¹ªº³]­p»P¹ê²{"
 Chien-Hung Kuo
 ³¢«Ø§»
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2003
 ¥Á°ê92¦~6¤ë
9  "Design of 5-GHz CMOS RF Receiver Front-End Circuitss"
 "5-GHz¤¬¸É¦¡ª÷®ñ¥b®gÀW±µ¦¬¾÷«eºÝ¹q¸ô³]­p"
 Chih-Chun Tang
 ­ð§Ó²E
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2002
 ¥Á°ê91¦~6¤ë
8  "Implementation and Application of CMOS DLL/PLL"
 "¤¬¸É¦¡ª÷®ñ¥b©µ¿ðÂê©w°j¸ô¤ÎÂê¬Û°j¸ô¤§¹ê²{»PÀ³¥Î"
 Guang-Kaai Dehng
 ¾H¥úñZ
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2001
 ¥Á°ê90¦~6¤ë
7  "CMOS Exponential Analog Signal Processing Applications"
 "¤¬¸É¦¡ª÷®ñ¥b³õ®Ä¹q´¹Å骺«ü¼ÆÃþ¤ñ°T¸¹³B²zÀ³¥Î"
 Cheng-Chieh Chang
 ±i¥¿ªN
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2001
 ¥Á°ê90¦~6¤ë
6  "Design of Clock synchronizers and Frequency Synthesizers"
 "®É¯ß¦P¨B¾¹»PÀW²v¦X¦¨¾¹¤§³]­p"
 Ching-Yuan Yang
 ·¨²M²W
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2000
 ¥Á°ê89¦~6¤ë

 Co-Instructed

¡ô  Subject / ¬ã¨s¥DÃD  Author / §@ªÌ  Professor / «ü¾É±Ð±Â  Date / ¤é´Á
5  "The Design and Realization of Highly Accurate CMOS Time-to-Digital Converters"
 "°ªºë«×¤¬¸Éª÷®ñ¥b®É¶¡¦Ü¼Æ¦ìÂà´«¾¹¤§³]­p»s§@"
 ³¯§B©_
 

 Jingshown Wu
 §dÀR¶¯±Ð±Â

 Shen-Iuan Liu
 ¼B²`²W±Ð±Â

 Jan. 2001
 ¥Á°ê90¦~1¤ë
4  "Design and Analysis on Magnetoresistor and Magnetotransistor"
 "ºÏ¹qªý»PºÏ¹q´¹Å餧³]­p»P¤ÀªR"
 §º°ê©ú
 

 Jingshown Wu
 §dÀR¶¯±Ð±Â

 Shen-Iuan Liu
 ¼B²`²W±Ð±Â

 Jan. 2001
 ¥Á°ê90¦~1¤ë
3  "The Design of New Linear Transformation Active Filters"
 "·s«¬½u©ÊÂà´«¦³·½Âoªi¾¹¤§³]­p"
 ¶À¨|½å
 

 Yan-Pei Wu
 §dª¢°ö±Ð±Â

 Shen-Iuan Liu
 ¼B²`²W±Ð±Â

 Dec. 1995
 ¥Á°ê84¦~12¤ë
2  "The Design and Applications of Some Analog MOS Circuits Using Triode-Transistors"
 "¨Ï¥Î¤T·¥°Ï¤§ª÷®ñ¥b³õ®Ä¹q´¹Å骺­Y¤zÃþ¤ñ¹q¸ô³]­p»PÀ³¥Î"
 ½²«Øªl
 

 Yan-Pei Wu
 §dª¢°ö±Ð±Â

 Shen-Iuan Liu
 ¼B²`²W±Ð±Â

 Dec. 1995
 ¥Á°ê84¦~12¤ë
1  "The Design of New CMOS Amplifiers and Their Applications in Linear and Non-linear Circuits"
 "·s«¬¤¬¸É¦¡ª÷®ñ¥b¾ÉÅé©ñ¤j¾¹ªº³]­p¤Î¨ä¦b½u©Ê»P«D½u©Ê¹q¸ô¤Wªº­Y¤zÀ³¥Î"
 ³¯«Ø¤¤
 

 Hen-Wai Tsao
 ±ä«í°¶±Ð±Â

 Shen-Iuan Liu
 ¼B²`²W±Ð±Â

 June 1995
 ¥Á°ê84¦~6¤ë

 

 

(C). Master theses

¡ô  Subject / ¬ã¨s¥DÃD  Author / §@ªÌ  Professor / «ü¾É±Ð±Â  Date / ¤é´Á
151  "Baud-Rate PAM-4 Receivers Using Time-Based Circuits and Hardware Reduction"
 "¨Ï¥Î®É°ì¹q¸ô¤Î¸`¬ÙµwÅ餧Àj²v¥|¶¥¯ß½Ä®¶´T½ÕÅܱµ¦¬¾÷"
 Yuan-Pang Huang
 ¶À¤¸¨¹
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Feb. 2024
 ¥Á°ê113¦~2¤ë
150  "A 40-Gbps PAM-3 Receivers Using 2x-Oversampling or Baud-rate Phase Detectors"
 "¨Ï¥Î¨â­¿¹L¨ú¼Ë©ÎÀj²v¬Û¦ì°»´ú¾¹¤§¥|¦Ê»õ¦ì¤¸¨C¬íªº¤T¶¥¯ß½Ä®¶´T½ÕÅܱµ¦¬¾÷"
 Jhe-En Lin
 ªL­õ®¦
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Feb. 2024
 ¥Á°ê113¦~2¤ë
149  "A 36Gb/s PAM-3 Baud-Rate Receiver Using Inductor-Reused CTLE and One-Tap Loop-Unrolled DFE"
 "¤@­Ó¨ã¦³¹q·P­«½Æ¨Ï¥Îªº½u©Êµ¥¤Æ¾¹©M¤@¶¥¨Mµ¦°j±Âµ¥¤Æ¾¹¤§¤T¦Ê¤»¤Q»õ¦ì¤¸¨C¬íªº¤T¶¥¯ß½Ä®¶´T½ÕÅÜÀj²v±µ¦¬¾÷"
 Pin-Yuan Chiu
 ªô«~·½
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2024
 ¥Á°ê113¦~1¤ë
148  "Baud-Rate Clock and Data Recovery Circuits Using Semirotational Frequency Detection and Jitter-Tolerance-Enhanced Technique"
 "¨Ï¥Î¥b±ÛÂàÀW²v°»´ú»P¼W±j§Ý°Ê®e§Ô§Þ³N¤§Àj²v®É¯ß¸ê®ÆÁÙ­ì¹q¸ô"
 Hsi-Kai Peng
 ´^º³³Í
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2023
 ¥Á°ê112¦~7¤ë
147  "Baud-Rate Clock/Data Recovery Circuits using Asymmetrical PD and DPR tools"
 "¨Ï¥Î«D¹ïºÙ¬Û¦ì°»´ú¾¹»P¼Æ¦ì¶½uªºÀj²v®É¯ß¸ê®ÆÁÙ­ì¹q¸ô"
 Po-Yuan Chou
 ©P¬f·½
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2023
 ¥Á°ê112¦~6¤ë
146  "Reference-less and Adaptive 2x Half-baud-rate Receivers"
 "¨ãµL°Ñ¦Ò·½»P¥i¾A©Ê¤§Àj²v±µ¦¬¾÷"
 Yi-Hao Lan
 ÄxÖö»¨
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 May 2023
 ¥Á°ê112¦~5¤ë
145  "A 16-Gb/s Linear Equalizer and Decision-Feedback Equalizer With an Adaptation Time of 0.3us"
 "¤@­Ó¤@¦Ê¤»¤Q»õ¦ì¤¸¨C¬íªº½u©Êµ¥¤Æ¾¹»P¨ã¦Û¾AÀ³®É¶¡0.3·L¬íªº¨Mµ¦¦^±Âµ¥¤Æ¾¹"
 Ming-Xuan Zhan
 ¸â»Ê°a
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2022
 ¥Á°ê111¦~7¤ë
144  "A 3.2-GHz Digital PLL With Adaptive Loop Gain Calibration"
 "¨ã¾AÀ³©Ê°j¸ô¼W¯q®Õ¥¿ªº¤T¤Q¤G»õ»®¯÷ªº¼Æ¦ìÂê¬Û°j¸ô"
 Honglin Ji
 ¬ö§»åû
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2022
 ¥Á°ê111¦~7¤ë
143  "A 16-Gb/s Edge-Based Sub-Baud-Rate CDR Circuit"
 "Ãä½t±Ä¼Ë¦¸Àj²v¤§16-Gb/s¼Æ¦ì®É¯ß¸ê®ÆÁÙ­ì¹q¸ô"
 Wen-Chi Huang
 ¶À¤å¬è
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 May 2022
 ¥Á°ê111¦~5¤ë
142  "A 7~10.5-Gb/s Reference-Less Linear Half-rate CDR Circuit Using Automatic Band Selector"
 "¨Ï¥Î¦Û°ÊÀW¬q¿ï¾Ü¾¹¤§7~10.5-Gb/s¥b³t²v½u©Ê®É¯ß¸ê®ÆÁÙ­ì¹q¸ô"
 Yi-En Hsu
 ®}·¸®¦
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 May 2022
 ¥Á°ê111¦~5¤ë
141  "A 10.5Gbps Adaptive Time-Based Decision Feedback Equalizer"
 "¤@­Ó10.5Gbps¥i¾A©Ê®É°ì¨Mµ¦¦^±Âµ¥¤Æ¾¹"
 Hsin-Yi Peng
 ´^ÄÉ»ö
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Feb. 2022
 ¥Á°ê111¦~2¤ë
140  "A 2-3 GHz Fast-Locking PLL Using Phase Error Compensator"
 "¨Ï¥Î¬Û¦ì»~®t¸ÉÀv¾¹¤§20-30»õ»®¯÷§Ö³tÂê©wÂê¬Û°j¸ô"
 Jia-Rong Chang
 ±i®aºa
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Aug. 2021
 ¥Á°ê110¦~8¤ë
139  "Digital Phase-Locked Loops Using Adaptive Loop Gain Controller and Feedforward Phase-Error Cancellation"
 "¨ã³Æ°j¸ô¼W¯q±±¨î»P«eõX¬Û¦ì®Õ¥¿¤§¼Æ¦ìÂê¬Û°j¸ô"
 Zhi-Heng Kang
 ±d´¼«í
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Aug. 2021
 ¥Á°ê110¦~8¤ë
138  "A 20Gb/s Adaptive Decision Feedback Equalizer with 1 Discrete-time Tap and 1 IIR Feedback"
 "¨ãÂ÷´²®É¶¡¤ÎµL­­¯ß½ÄÅTÀ³Âoªi¾¹¦^±Â¤§¨â¦Ê»õ¦ì¤¸¨C¬í¥i¾A©Ê¨Mµ¦¦^±Âµ¥¤Æ¾¹"
 Shih-Hsuan Wei
 ÃQ¥@°a
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2021
 ¥Á°ê110¦~7¤ë
137  "Baud-Rate Clock/Data Recovery Circuits with Wide-range FD and Jitter-Tolerance-Enhanced Technique"
 "¨Ï¥Î¼e½d³òÀW²v°»´ú¾¹»P§Ý°Ê®e§Ô«×¼W±j§Þ³NªºÀj²v®É¯ß¸ê®ÆÁÙ­ì¹q¸ô"
 Wei-Ming Chen
 ³¯±L»Ê
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2021
 ¥Á°ê110¦~6¤ë
136  "A Wide Input Power Range Self-Oscillating Switched-Capacitor Converter with FOCV-Based MPPT"
 "¨Ï¥Î¶}¸ô¹qÀ£ªk³Ì¤j¥\²vÂI°lÂÜ¥\¯à¤§¼e¿é¤J¥\²v½d³ò¦Û¿E®¶Àú¤Á´«¹q®e¦¡¹qÀ£Âà´«¾¹"
 Min-Hsuan Wu
 §d±Ó¸©
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Mar. 2021
 ¥Á°ê110¦~3¤ë
135  "A Fast-Locking Multiplying Delay-Locked Loop"
 "¤@­Ó§Ö³tÂê©w¤§­¿ÀW©µ¿ðÂê©w°j¸ô"
 Yen-Yu Chao
 »¯®Ë·®
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2021
 ¥Á°ê110¦~1¤ë
134  "Sub-Sampling PLLs with Short Re-locking-Time FLL or Bandwidth-Enhanced Technique"
 "¾Ö¦³µu­«Âê®É¶¡ÂêÀW°j¸ô©ÎÀW¼e´£¤É§Þ³N¤§¦¸¨ú¼Ë¦¡Âê¬Û°j¸ô"
 Yuan-Cheng Qian
 ¿ú·½©Ó
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Dec. 2020
 ¥Á°ê109¦~12¤ë
133  "A 13.56MHz Hybrid-Mode Wireless Power Receiver with Enhancing PCE Using Conduction Time Calibration"
 "¤@­Ó¨Ï¥Î¦Û¾AÀ³½Õ¸`¾É³q®É¶¡¨Ó´£°ª¥\²vÂà´«²vªº13.56MHz²V¦X¼Ò¦¡µL½u¥\²v±µ¦¬¾¹"
 Cheng-Chi Huang
 ¶À©Ó±Ò
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Dec. 2020
 ¥Á°ê109¦~12¤ë
132  "Digital Phase-Locked Loop With Background Supply Noise Cancellation and Injection-Locked Clock Multiplier"
 "­I´º®ø°£¨ÑÀ³¹qÀ£Âø°Tªº¼Æ¦ìÂê¬Û°j¸ô»Pª`¤JÂê©w®É¯ß­¿ÀW¾¹"
 Yen-Min Tseng
 ´¿«Û¶{
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2020
 ¥Á°ê109¦~7¤ë
131  "Type-I PLLs with Bandwidth Calibration and Subharmonically Injection-locked Technique"
 "²Ä¤@«¬Âê¬Û°j¸ô¤§ÀW¼e®Õ¥¿»P¦¸¿Óªiª`¤JÂê©w§Þ³N"
 Ming-Han Chou
 ©P©ú¿«
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2020
 ¥Á°ê109¦~7¤ë
130  "Clock/Data Recovery Circuits Using Wide-range Baud-rate FD and BLGC"
 "¨Ï¥Î¼e½d³òÀj²v¤§ÀW²v°»´ú¾¹»P­I´º°j¸ô¼W¯q±±¨îªº®É¯ß¸ê®ÆÁÙ­ì¹q¸ô"
 Yun-Sheng Yao
 «À¤¹¤É
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2020
 ¥Á°ê109¦~6¤ë
129  "A 2.4-3.0GHz Process-Tolerant Sub-Sampling PLL with Loop Bandwidth Calibration"
 "¤@­Ó¨Ï¥Î°j¸ôÀW¼e®Õ¥¿­°§C»sµ{Åܲ§ªº2.4-3.0¤Q»õ»®¯÷¦¸¨ú¼ËÂê¬Û°j¸ô"
 Yong-Ru Lu
 §f¤f¥Ã¾§
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 May 2020
 ¥Á°ê109¦~5¤ë
128  "Indoor Photovoltaic Energy Harvesters Using Multi-Mode and Time-Based MPPT"
 "«Ç¤º¥Î¥ú¥ñ¯à·½±µ¦¬¹q¸ô¨Ï¥Î¦h¼Ò¦¡¥H¤Î®É°ì³Ì¤j¥\²vÂI°lÂÜ"
 Ming-Chia Chang
 ±i»Ê®a
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Nov. 2019
 ¥Á°ê108¦~11¤ë
127  "A 1.5-6 Gb/s Clock and Data Recovery Circuit Reducing Cycle Slipping"
 "§ïµ½¶g´Á¦¡·Æ²æ²{¶H¤§¤@­Ó1.5-6 Gb/s®É¯ß»P¸ê®Æ¦^´_¹q¸ô"
 Wei-Liang Lin
 ªL°¶¨}
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2019
 ¥Á°ê108¦~7¤ë
126  "A 5-Gb/s Adaptive Digital CDR Circuit with SSC Capability and Enhanced High-Frequency JTOL"
 "¨ã®iÀW°lÂÜ»P¸û¨Î°ªÀW§Ý°Ê®e§Ô«×¤§5-Gb/s¼Æ¦ì®É¯ß¸ê®Æ¦^´_¹q¸ô"
 Shun-Chi Chang
 ±iµÏ´Ñ
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2019
 ¥Á°ê108¦~7¤ë
125  "A Phase-Locked Loop Using a Single-Ring-Oscillator-Based Integrator and a Digital Phase-Locked Loop With Adaptive Loop Gain Controller"
 "°ò©ó®É°ì¿n¤À¾¹¤§Âê¬Û°j¸ô»P¼Æ¦ìÂê¬Û°j¸ô¤§°j¸ô¼W¯q³Ì¨Î¤Æ"
 Guan-Yu Su
 Ä¬«a¦t
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2019
 ¥Á°ê108¦~6¤ë
124  "A PVT-Tolerant MDLL with a Background Coarse-Frequency Selector and a Frequency Calibrator using a Delay-Calibrated SSPD"
 "¨ã»sµ{¡B¹qÀ£»P·Å«×­I´º®Õ¥¿¤§­¿ÀW©µ¿ðÂê©w°j¸ô"
 Yu-Kai Chiu
 ªôà±³Í
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2019
 ¥Á°ê108¦~1¤ë
123  "A Low-Power High-Channel-Loss Equalizer with CTLE, 3-Tap DFE and SSLMS in 0.11um CMOS process"
 "¤@­Ó¹ê²{©ó0.11·L¦Ì»sµ{¤§§C¥\²v°ª·l¯Ó¸ÉÀvµ¥¤Æ¾¹"
 Yong-Ren Fang
 ¤èµú¤¯
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Oct. 2018
 ¥Á°ê107¦~10¤ë
122  "An 8 Gb/s Adaptive Receiver with Eye-width Detection"
 "¨Ï¥Î²´¼e°»´ú¤§¤K¤Q»õ¦ì¤¸³t²v¥i¾A©Ê±µ¦¬¾¹"
 Sheng-Hao Tseng
 ´¿¸t»¨
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Oct. 2018
 ¥Á°ê107¦~10¤ë
121  "A 13.56MHz Current-Mode Wireless Power Receiver With Energy-Investment Capability"
 "¤@­Ó¨ã¯à¶q´£¤É¥\¯àªº13.56MHz¹q¬y¼Ò¦¡µL½u¥\²v±µ¦¬¾¹"
 Chung-Jen Kuo
 ³¢¥ò¤¯
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Oct. 2018
 ¥Á°ê107¦~10¤ë
120  "Low TC Relaxation Oscillators with Digital Compensation"
 "¨ã¼Æ¦ì¸ÉÀv¤§§C·Å«×«Y¼Æ¦¢±i®¶Àú¾¹"
 Yi-An Chang
 ±i¥ç¦w
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2018
 ¥Á°ê107¦~6¤ë
119  "Digital Phase-Locked Loop with Background Supply Noise Calibration and PVT-Tolerant Injection-Locked Clock Multiplier"
 "­I´º®Õ¥¿¨ÑÀ³¹qÀ£Âø°T¤§¼Æ¦ìÂê¬Û°j¸ô»Pª`¤JÂê©w®É¯ß­¿ÀW¾¹"
 Che-Wei Tien
 ¥Ð­õÞ³
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2017
 ¥Á°ê106¦~6¤ë
118  "A Low-Power and Small-Area Jitter Detector Using Asynchronous Sampling"
 "§Q¥Î«D¦P¨B¨ú¼Ëªº§C¥\²v®ø¯Ó»P¤p­±¿n§Ý°Ê°»´ú¾¹"
 Hsien-Che Chen
 ³¯¥ý­õ
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2017
 ¥Á°ê106¦~6¤ë
117  "Design of 20Gbps Adaptive Linear Equalizer and Decision Feedback Equalizer"
 "¨â¦Ê»õ¦ì¤¸¨C¬í¥i¾A©Ê½u©Êµ¥¤Æ¾¹»P¨Mµ¦¦^±Âµ¥¤Æ¾¹¤§³]­p"
 Kuan-Yu Chen
 ³¯«a¦t
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Oct. 2016
 ¥Á°ê105¦~10¤ë
116  "An All-Digital Clock and Data Recovery Circuit with Bandwidth Calibration"
 "¨ã¦³®Õ¥¿ÀW¼e¤§¥þ¼Æ¦ì¸ê®Æ¦^´_¹q¸ô"
 Yu-Syuan Du
 §ù¬Ræ¢
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2016
 ¥Á°ê105¦~7¤ë
115  "An Area-Efficient Subharmonically Injection-Locked Fractional-N Frequency Synthesizer with a Fast-Converging Correlation Loop"
 "¤p­±¿n¨Ã¨ã§Ö³t¦¬ÀĬÛÃö©Ê°j¸ô¤§¦¸¿Óªiª`¤JÀW²v¦X¦¨¾¹"
 Yen-Hsiang Tseng
 ´¿«Ûµ¾
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2016
 ¥Á°ê105¦~7¤ë
114  "Ultra-low Power Relaxation Oscillators with Temperature Compensation"
 "·Å«×¸ÉÀvªº·¥§C¥\¯Ó¦¢±i¾_Àú¾¹"
 Hsueh Roger
 Á§¤åªN
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2016
 ¥Á°ê105¦~7¤ë
113  "A 5 Gb/s Voltage-Mode Transmitter Using Adaptive Time-Based De-Emphasis"
 "¨Ï¥Î®É¶¡¼Ò¦¡¥h¥[±jªk¤§50»õ¦ì¤¸¥i¾A©Ê¹qÀ£¼Ò¦¡¶Ç°e¾¹"
 Wun-Jian Su
 Ä¬¤å«Ø
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2016
 ¥Á°ê105¦~6¤ë
112  "Applications of Phase-Locked Loops with Area-Efficiency and Background Supply Noise Cancellation"
 "À³¥Î©ó¤p­±¿n»P­I´º®Õ¥¿¨ÑÀ³¹qÀ£Âø°T¤§Âê¬Û°j¸ô"
 Che-Wei Yeh
 ¸­­õºû
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2015
 ¥Á°ê104¦~6¤ë
111  "Low Noise Application of Phase-Locked Loops with Injection-Pulse-Width Calibration and Delta-Sigma Time-to-Digital Converters"
 "ª`¤J¯ßªi¼e«×®Õ¥¿»P¤T¨¤¿n¤À®É¶¡¼Æ¦ìÂà´«¾¹ªº§CÂø°TÀ³¥ÎÂê¬Û°j¸ô"
 Chih-Lu Wei
 ÃQ§Ó®È
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2014
 ¥Á°ê103¦~7¤ë
110  "Piezoelectric Energy Harvesting Interface Circuit and Molecular Readout Circuit for Biomedical Micro Systems"
 "À³¥Î©ó¥ÍÂå·L«¬¨t²Î¤§À£¹q§÷®Æ¤¶­±¹q¸ô»P¤À¤l¿@«×·P´ú¹q¸ô"
 Chi-Yun Liu
 ¼B¨ä©û
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2014
 ¥Á°ê103¦~7¤ë
109  "Design of Sub-microwatt Oscillators with Temperature Compensations"
 "¨ã¦³·Å«×¸ÉÀvªº²@·L¥\¯Ó®¶Àú¾¹¤§³]­p"
 Ya-Shan Lee
 §õ¨È¬À
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2014
 ¥Á°ê103¦~7¤ë
108  "Digital Multiplying Delay-Locked Loop Using Switched Biasing Technique and Digital Phase-Locked Loop with Bandwidth Calibration"
 "¨Ï¥Î¤Á´«°¾À£§Þ³N¤§¼Æ¦ì­¿ÀW©µ¿ðÂê©w°j¸ô»P¨ã¦³ÀW¼e®Õ¥¿¤§¼Æ¦ìÂê¬Û°j¸ô"
 Chi-Huan Chiang
 ½±©u¾È
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2014
 ¥Á°ê103¦~7¤ë
107  "5~20 Gb/s Adaptive Linear Equalizer and Decision-Feedback Equalizer"
 "50~200 »õ¦ì¤¸¤§¥i¾A©Ê½u©Êµ¥¤Æ¾¹¤Î¨Mµ¦¦^±Âµ¥¤Æ¾¹"
 Yuan-Fu Lin
 ªL¤¸³@
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2014
 ¥Á°ê103¦~7¤ë
106  "Divider-Less Clock and Data Recovery Circuit and Multiplying Delay-Locked Loop"
 "µL°£ÀW¾¹¤§®É¯ß»P¸ê®Æ¦^Âйq¸ô¤Î­¿ÀW©µ¿ðÂê¬Û°j¸ô"
 Sheng-Tzung Chen
 ³¯¸t©v
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2014
 ¥Á°ê103¦~7¤ë
105  "Nanopower Oscillators with Temperature Compensation"
 "·Å«×¸ÉÀvªº²@·L¥\¯Ó®¶Àú¾¹"
 Yu-Hsuan Chiang
 ¦¿¨Ý°a
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2014
 ¥Á°ê103¦~1¤ë
104  "Design and Analysis of 25 Gb/s Optical Receivers"
 "¤G¦Ê¤­¤Q»õ¦ì¤¸¨C¬í¤§¥ú±µ¦¬¾¹¹q¸ôªº³]­p»P¤ÀªR"
 Yu-Hsun Chien
 Â²¦ö³Ô
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2014
 ¥Á°ê103¦~1¤ë
103  "A Divider-Less Sub-Harmonically Injection-Locked All-Digital PLL with Self-Adjusted Injection Timing"
 "¨ã¦³¦Û§Ú®Õ¥¿ª`¤JÂI¤§µL°£ÀW¾¹¦¸¿Óªiª`¤JÂê©w¥þ¼Æ¦ìÂê¬Û°j¸ô"
 Kai-Hui Tseng
 ´¿³Í·u
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2014
 ¥Á°ê103¦~1¤ë
102  "A Fractional-N Frequency Synthesizer with Noise-Filtering Technique"
 "À³¥ÎÂø°TÂoªi§Þ¥©¤§«D¾ã¼ÆÀW²v¦X¦¨¾¹"
 Kun-Hsun Liao
 ¹ù±X³Ô
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2014
 ¥Á°ê103¦~1¤ë
101  "Design and Analysis of Tens of Gb/s Multi-Channel Clock and Data Recovery Circuits"
 "¼Æ¦Ê»õ¦ì¤¸¦h³q¹D®É¯ß¸ê®Æ¦^´_¹q¸ô¤§³]­p»P¤ÀªR"
 Chien-Kai Kao
 °ª°·³Í
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2014
 ¥Á°ê103¦~1¤ë
100  "Fast-Locking Adaptive Equalizers with Blind Sampling and A Duobinary Transceiver"
 "§Ö³tÂê©w¤§«D¦P¨B¨ú¼Ë¥i¾A©Êµ¥¤Æ¾¹¤Î¤@­ÓÂù¤G¤¸¦¬µo¾¹"
 Ko-Wen Liao
 ¹ù¥i¤å
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2013
 ¥Á°ê102¦~1¤ë
99  "4Gbps Parallel Interface Receivers with Adaptive Far-End Crosstalk Cancellation"
 "¨ã¦³¥i¾A©Ê»·ºÝ¦ê­µ®ø°£¤§4Gbps¥­¦æ¤¶­±±µ¦¬¾¹"
 Yan-Yu Lin
 ªL«Û¦t
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2013
 ¥Á°ê102¦~1¤ë
98  "H-Band Injection-Locked Frequency Dividers"
 "À³¥Î©óH-Band ¤§ª`¤JÂê©w°£ÀW¾¹"
 Li-Yuan Lee
 §õ¥ß·½
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jun. 2012
 ¥Á°ê101¦~6¤ë
97  "A 4.8~6GHz All-Digital Fractional-N Frequency Synthesizer for Software-Defined Radio"
 "¤@­Ó4.8~6¤Q»õ»®¯÷À³¥Î©ó³nÅéµL½u¦¬µo¾¹¤§¥þ¼Æ¦ì°£¤p¼ÆÀW²v¦X¦¨¾¹"
 Tsung-Han Lee
 §õ©v¿«
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jun. 2012
 ¥Á°ê101¦~6¤ë
96  "Phase-Locked Loop and Temperature Compensated Oscillator"
 "Âê¬Û°j¸ô©M·Å«×¸ÉÀv®¶Àú¾¹"
 Peng-Sheng Chen
 ³¯ÄP¤É
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jun. 2012
 ¥Á°ê101¦~6¤ë
95  "Sub-Terahertz Injection-Locked Frequency Dividers and Multipliers"
 "¦¸¥ü»®ª`¤JÂê©w°£ÀW¾¹¤Î­¿ÀW¾¹"
 Pin-Hao Feng
 ¶¾«~µq
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jun. 2012
 ¥Á°ê101¦~6¤ë
94  "All-Digital Spread Spectrum Clock Generator with Self-Calibrated Bandwidth and De-Spreading Clock Generator"
 "¨ã¦³¦Û§Ú°j¸ôÀW¼e®Õ¥¿¤§¥þ¼Æ¦ì®iÀW®É¯ß²£¥Í¾¹»P¸Ñ®iÀW®É¯ß²£¥Í¾¹"
 Shih-Han Ku
 ¥jÃѲ[
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2012
 ¥Á°ê101¦~1¤ë
93  "A 6 GHz Fractional-N Frequency Synthesizer Using Embedded FIR Filter Technique"
 "¤@­Ó¨Ï¥Î´O¤J¦¡¦³­­¯ßªiÅTÀ³Âoªi¾¹ªº60»õ»®¯÷°£¤p¼ÆÀW²v¦X¦¨¾¹"
 Hung-Yu Lu
 ¿cªl¿Ù
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jul. 2011
 ¥Á°ê100¦~7¤ë
92  "Analysis and Design of Adaptive Receiver and Subharmonically Injection-Locked PLL"
 "¥i¾A©Ê±µ¦¬¾÷»P¦¸¿Óªiª`¤JÂê¬Û°j¸ô¤ÀªR»P³]­p"
 Yi-Chieh Huang
 ¶À¶h³Ç
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jul. 2011
 ¥Á°ê100¦~7¤ë
91  "Equalizer with Adaptive Techniques in High-Speed Backplane Communication"
 "¥i¾A©Êµ¥¤Æ¾¹§Þ³NÀ³¥Î©ó°ª³t­IªO³q°T"
 Yu-Ming Ying
 ÃC¦t©ú
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jul. 2011
 ¥Á°ê100¦~7¤ë
90  "Wireless Ultrasound Stimulation Microsystem"
 "µL½u¶W­µªi¯«¸g¹q¨ë¿E¾¹"
 Jyun-Ru Wang
 ¤ýÂ@¾§
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jul. 2011
 ¥Á°ê100¦~7¤ë
89  "Design and Implementation of High Speed Fully-Differential Zero-Crossing-Based Circuits Pipelined Analog-to-Digital Converters"
 "¥HÁ{¬É°»´ú¹q¸ô¬°°ò¦¤§°ª³t¥þ®t°ÊÃþ¤ñ¼Æ¦ìÂà´«¾¹"
 Hung-Yu Cheng
 ¾G¶£Ñ{
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Nov. 2010
 ¥Á°ê99¦~11¤ë
88  "Millimeter-Wave Injection-Locked Frequency Dividers"
 "²@¦Ìªi¬qª`¤J¦¡Âê©w°£ÀW¾¹"
 Chiao-Hsing Wang
 ¤ý¥©¬P
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2010
 ¥Á°ê99¦~7¤ë
87  "Phase-Locked Loops Using Self-Healing Circuits and Fast-Locking Technique"
 "¨ãº|¬y¸ÉÀv©M§Ö³tÂê©w¤§Âê¬Û°j¸ô"
 Yun-Ta Tsai
 ½²©û¹F
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2010
 ¥Á°ê99¦~7¤ë
86  "Design and Application of All-Digital Delay-Locked Loop and All-Digital Phase-Locked Loop"
 "¥þ¼Æ¦ì©µ¿ðÂê©w°j¸ô¤Î¥þ¼Æ¦ìÂê¬Û°j¸ô¤§³]­p»PÀ³¥Î"
 You-Jen Wang
 ¤ý¦ö¤¯
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2010
 ¥Á°ê99¦~7¤ë
85  "All-digital delay-locked loop with supply noise suppression technique"
 "¨ã¦³¹q·½¹qÀ£Âø°T§í¨î¥\¯à¤§¥þ¼Æ¦ì©µ¿ðÂê©w°j¸ô"
 Chia-Hao Tsai
 ½²®a»¨
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Dec. 2009
 ¥Á°ê98¦~12¤ë
84  "¨ã¬Û¦ì»~®t®Õ¥¿¤§©µ¿ðÂê©w°j¸ô³]­p»P¹ê²{"
 (¹q¾÷¹q«H¹q¤l²£·~¬ãµoºÓ¤h±M¯Z)
 Kuang-Fu Teng
 ¾H¦J´_
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2009
 ¥Á°ê98¦~6¤ë
83  "All-Digital Spread Spectrum Clock Generators"
 "¥þ¼Æ¦ì®iÀW®É¯ß²£¥Í¾¹"
 Sheng-You Lin
 ªL¸t¯§
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2009
 ¥Á°ê98¦~1¤ë
82  "All-digital Clock and Data Recovery and All-digital Phase-locked Loop"
 "¥þ¼Æ¦ì®É¯ß¸ê®Æ¦^´_¾¹¤Î¥þ¼Æ¦ìÂê¬Û°j¸ô"
 I-Fong Chen
 ³¯©ö·¬
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2009
 ¥Á°ê98¦~1¤ë
81  "Design of Comparator-Based Switched-Capacitor Second-Order Sigma-Delta Modulator in Low-Temperature Poly-Silicon Thin-Film Transistor Technology"
 "¥þ¤ñ¸û¾¹¤G¶¥¤T¨¤¿n¤À½ÕÅܾ¹©ó§C·Å¦h´¹ª¿Á¡½¤¹q´¹Åé»sµ{¤§³]­p"
 Chan-Fei Lin
 ªL´ï´´
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Dec. 2008
 ¥Á°ê97¦~12¤ë
80  "Design and Implementation of Fully-Differential Comparator-Based Switched-Capacitor Analog-to-Digital Converters"
 "¥H¤ñ¸û¾¹§@¬°°ò¦¬[ºcªº¥þ®t°Ê¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹"
 Mu-Chen Huang
 ¶À¨N¹Ð
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Nov. 2008
 ¥Á°ê97¦~11¤ë
79  "¹B¥Î©ó¥D°Ê¯x°}²G´¹Åã¥Ü¾¹¤§«D´¹ª¿Á¡½¤¹q´¹ÅéÅX°Ê¹q¸ô"  ¶ÀÁ¾¾±  Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 January 2008
 ¥Á°ê97¦~1¤ë
78  "¥Î©ó»¼°j¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹¤§¼Æ¦ì­I´º®Õ¥¿§Þ³N"
 (¹q¾÷¹q«H¹q¤l²£·~¬ãµoºÓ¤h±M¯Z)
 Shih-Chin Chou
 ©P¤h´Ü
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 January 2008
 ¥Á°ê97¦~1¤ë
77  "¨ã­I´º¼Æ¦ì®Õ¥¿¥\¯àªº¤ÀÂ÷¦¡¬[ºc´`Àô¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹ªº¹ê²{"
 (¹q¾÷¹q«H¹q¤l²£·~¬ãµoºÓ¤h±M¯Z)
 Ing-June Lu
 ¿c¬Õ§g
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 January 2008
 ¥Á°ê97¦~1¤ë
76  "Design and Implement of Wireless Power Telemetry Circuits for Implantable Biomedical Micro-System"
 "À³¥Î©ó´Ó¤J¦¡¥ÍÂå·L«¬¨t²Î¤§µL½u¥\²v»»´ú¾¹¤§³]­p»P¹ê§@"
 Chein-Lung Chen
 ³¯«ØÀs
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2007
 ¥Á°ê96¦~6¤ë
75  "Burst-Mode Receiver for Passive Optical Networks"
 "À³¥Î©ó³Q°Ê¥úÅÖºô¸ô¤§¬ðµo¦¡±µ¦¬¾¹"
 Hong-Lin Chu
 ¦¶­iÀM
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2007
 ¥Á°ê96¦~6¤ë
74  "A Frequency Synthesizer for UWB Application"
 "À³¥Î©ó¶W¼eÀW¨t²Î¤§ÀW²v¦X¦¨¾¹"
 Che-Wei Fan
 ­S­õÞ³
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2007
 ¥Á°ê96¦~6¤ë
73  "A Spread Spectrum Clock Generator Based on a Fractional-N Frequency Synthesizer"
 "§Q¥Î°£¤p¼ÆÀW²v¦X¦¨¾¹»s§@¤§®iÀW®É¯ß²£¥Í¾¹"
 Ding-Shiuan Shen
 ¨H¹©Â{
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2007
 ¥Á°ê96¦~6¤ë
72  "A Digitally-Calibrated 65GHz Phase-Locked Loop"
 "¨ã¼Æ¦ì®Õ¥¿¤§¤»¦Ê¤­¤Q»õ»®¯÷Âê¬Û°j¸ô"
 Jia-Hao Wu
 §d®a»¨
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2007
 ¥Á°ê96¦~6¤ë
71  "Design and Implementation of Bang-Bang Phase/Frequency Detectors"
 "¤G¤¸¬Û¦ìÀW²v°»´ú¾¹¤§³]­p»PÀ³¥Î"
 Shao-Hung Lin
 ªL²Ð¥°
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2007
 ¥Á°ê96¦~6¤ë
70  "Design of RF Front-End Circuits for DVB-H Receivers"
 "À³¥Î©ó¤â´£¦¡¼Æ¦ì¹qµø±µ¦¬¾¹¤§®gÀW«eºÝ¹q¸ô³]­p"
 Hung-Hsu Wang
 ¤ý§»¦°
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2006
 ¥Á°ê95¦~6¤ë
69  "A Spur-Reduction Frequency Synthesizer for DVB-H Receivers"
 "À³¥Î©ó¤â´£¦¡¼Æ¦ì¹qµø±µ¦¬¾¹¤§¨ãÃäÀW§ïµ½ÀW²v¦X¦¨¾¹"
 Hsin-Hua Chen
 ³¯«H¾ì
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2006
 ¥Á°ê95¦~6¤ë
68  "All-Digital Fast-Locking Delay-Locked Loop with Duty Cycle Correction"
 "¨ã¦³¤u§@¶g´Á®Õ¥¿¯à¤Oªº¥þ¼Æ¦ì§Ö³tÂê©w©µ¿ðÂê©w°j¸ô"
 Bo-Jiun Chen
 ³¯¬f§¡
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2006
 ¥Á°ê95¦~6¤ë
67  "Design and Implementation of All-DigitalFast-Locked DLL-Based Clock Generators"
 "¥H©µ¿ðÂê©w°j¸ô¬°°ò¦ªº¥þ¼Æ¦ì§Ö³tÂê©w®É¯ß²£¥Í¾¹¤§³]­p»P¹ê§@"
 Chuan-Kang Liang
 ±çÃY¥ê
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2006
 ¥Á°ê95¦~6¤ë
66  "3.125Gbps Ethernet Transmitter for IEEE 802.3ae"
 "À³¥Î©óIEEE 802.3ae¤§3.125Gbps¤A¤Óºô¸ô¶Ç°e¾÷"
 Hung-Chung Chen
 ³¯ÂE¶v
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2005
 ¥Á°ê94¦~7¤ë
65  "Design and Implementation of the CMOS Low-Dropout Linear Regulators"
 "CMOS§CÀ£­°½u©ÊíÀ£¾¹ªº³]­p»P¹ê§@"
 Sao-Hung Lu
 §f²ÐÂE
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2005
 ¥Á°ê94¦~6¤ë
64  "The Design and Implementation of 5-bit 10Gb/s Track-and-Hold Circuit"
 "5-bit 10Gb/s°lÂÜ»P«O«ù¹q¸ôªº³]­p»P¹ê§@"
 Jia-Liang Lin
 ªL®a¨}
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2005
 ¥Á°ê94¦~6¤ë
63  "Burst-Mode Clock and Data Recovery Circuit for Passive Optical Networks"
 "À³¥Î©ó³Q°Ê¥úÅÖºô¸ô¤§®É¯ß¸ê®Æ¦^´_¹q¸ô"
 Sy-Chyuan Hwu
 ­J«ä¥þ
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2005
 ¥Á°ê94¦~6¤ë
62  "A Dual-Phase Digital PWM Controller for DC-DC Converters"
 "À³¥Î©óª½¬y-ª½¬yÂà´«¾¹¤§Âù¬Û¼Æ¦ì¯ß¼e½ÕÅܱ±¨î¾¹"
 Tysh-Bin Liu
 ¼B½çÙy
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2005
 ¥Á°ê94¦~6¤ë
61  "Design and Implementation of High Speed Channel Equalizer"
 "°ª³t³q¹Dµ¥¤Æ¾¹¤§³]­p»P»s§@"
 Chi-Lun Lo
 Ã¹±Ò­Û
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2005
 ¥Á°ê94¦~6¤ë
60  "100Mbps UWB transmitter using digital calibration technology"
 "¹B¥Î¼Æ¦ì®Õ¥¿§Þ³N¤§100Mbps UWBµo®g¾÷"
 Shih-Tsai Liu
 ¼B¥@¤~
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 January 2005
 ¥Á°ê94¦~1¤ë
59  "Wideband Amplifier and Automatic Gain Control Amplifier"
 "¼eÀW©ñ¤j¾¹¤Î¦Û°Ê¼W¯q½Õ¾ã°j¸ô"
 Wei-Sheng Chen
 ³¯«Â²±
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2004
 ¥Á°ê93¦~7¤ë
58  "Low-Noise Frequency Synthesizer for 802.11a"
 "À³¥Î©ó802.11a¤§§CÂø°TÀW²v¦X¦¨¾¹"
 Chun-Yi Kuo
 ³¢«T»ö
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 July 2004
 ¥Á°ê93¦~7¤ë
57  "Low Power Techniques for Phase-Locked Loops"
 "¹B¥Î§C¥\²v§Þ³N¤§Âê¬Û°j¸ô"
 Yen-Wen Chen
 ³¯«Û¤å
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2004
 ¥Á°ê93¦~6¤ë
56  "PLL Clock Generator with Phase Error Detector"
 "¹B¥Î¬Û¦ì»~®t°»´ú¾¹¤§Âê¬Û°j¸ô®É¯ß²£¥Í¾¹"
 Ju-Lin Chia
 ¸ë¾§ªL
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2004
 ¥Á°ê93¦~6¤ë
55  "The Design of Phase-Locked Loop Using Capacitive Multiplication Technique and Its Applications"
 "¨Ï¥Î¹q®e©ñ¤j§Þ³N¤§Âê¬Û°j¸ô³]­p¤Î¨äÀ³¥Î"
 Sheng-Chou Lee
 §õ³Ó¬w
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2004
 ¥Á°ê93¦~6¤ë
54  "Digital Error-Averaging Technique for Pipelined Analog-to-Digital Converter"
 "¨Ï¥Î¼Æ¦ì»~®t¥­§¡§Þ³N¤§¾ÉºÞ¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹"
 Wei-Jen Huang
 ¶À«Â¤¯
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2004
 ¥Á°ê93¦~6¤ë
53  "Continuous Rate Clock and Data Recovery Circuit"
 "³sÄò³t²v®É¯ß¸ê®Æ¦^Âйq¸ô"
 Kuan-Hua Chao
 »¯«aµØ
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2004
 ¥Á°ê93¦~6¤ë
52  "The Design and Implementation of Low-Voltage Delta-Sigma Modulator"
 "§C¹qÀ£¤T¨¤¿n¤À½ÕÅܾ¹¤§³]­p»P»s§@"
 Tsung-Kai Kao
 °ª©v·_
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2003
 ¥Á°ê92¦~6¤ë
51  "CMOS Limiting Amplifiers"
 "CMOS·¥­­©ñ¤j¾¹"
 Jieh-Wei Liao
 ¹ù¤¶°¶
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2003
 ¥Á°ê92¦~6¤ë
50  "Design and Implementation of Analog Front-end Circuits for Optical Communication System"
 "¥úÅÖ³q°TÃþ¤ñ«eºÝ¹q¸ô³]­p»P»s§@"
 Chung-Shun Liu
 ¼BªøµÏ
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2003
 ¥Á°ê92¦~6¤ë
49  "Design of CMOS DLL and Data Recovery Circuit"
 "CMOS©µ¿ðÂê©w°j¸ô¤Î¸ê®Æ¦^´_¹q¸ô¤§³]­p"
 Lan-Chou Cho
 ¨ôÁp¬w
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2003
 ¥Á°ê92¦~6¤ë
48  "Design and Implementation of a 3.125-Gb/s Clock Data Recovery Circuit"
 "3.125-Gb/s®É¯ß¸ê®Æ¦^Âйq¸ô¤§³]­p»P¹ê§@"
 Shang-Ping Chen
 ³¯©|Ùy
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2003
 ¥Á°ê92¦~6¤ë
47  "A GFSK Modulator by Using a Fractional-N Frequency Synthesizer"
 "À³¥Î°£¤p¼ÆÀW²v¦X¦¨¾¹¤§GFSK½ÕÅܾ¹"
 Yen-Tang Chang
 ±i«Û°ó
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2003
 ¥Á°ê92¦~6¤ë
46  "A Spread Spectrum Clock Generator Based on a Sigma-Delta Modulated Phase-Locked Loop"
 "¨Ï¥Î¤T¨¤¿n¤À½ÕÅÜÂê¬Û°j¸ô»s§@¤§®iÀW®É¯ß²£¥Í¾¹"
 Ling-Yi Chang
 ±i¬Â½Ë
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2003
 ¥Á°ê92¦~6¤ë
45  "The Design and Implementation of 66/133/266MHz Spread Spectrum Clock Generators"
 "66/133/266MHz®iÀW®É¯ß²£¥Í¾¹¤§³]­p»P»s§@"
 I-Hui Hua
 ªá©É¼z
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2002
 ¥Á°ê91¦~6¤ë
44  "A 1.0V, 10-Bit CMOS Pipelined Analog-to Digital Converter"
 "¤@¥ñ¤Q¦ì¤¸CMOS¾ÉºÞ¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹"
 Kuang-Wei Cheng
 ¾G¥ú°¶
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2002
 ¥Á°ê91¦~6¤ë
43  "Digital Error-Averaging Technique for Pipelined Analog to Digital Converter"
 "À³¥Î¼Æ¦ì»~®t¥­§¡§Þ³N¤§¾ÉºÞ¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹"
 Hwei-Yu Lee
 ¾¤¼z¥É
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2002
 ¥Á°ê91¦~6¤ë
42  "8-bit, High Conversion Rate Pipelined ADC with Improved Capacitors"
 "¨Ï¥Î§ï¨}«¬¹q®e¤§¤K¦ì¤¸°ª³t¾ÉºÞ¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹"
 Chin-Min Liu
 ¼B´¼¥Á
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2002
 ¥Á°ê91¦~6¤ë
41  "2.2GHZ CMOS Frequency Synthesizer and LC-tank Voltage-controlled Oscillators"
 "2.2GHZ CMOSÀW²v¦X¦¨¾¹¤ÎLCÀ£±±®¶Àú¾¹"
 Mign-Zhe Liu
 ¼B¦W­õ
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2002
 ¥Á°ê91¦~6¤ë
40  "5.2GHz CMOS RF Image-Rejection Mixers"
 "5.2GHz CMOS®gÀWÃè¹³®ø°£²Vªi¾¹"
 Chi-Han Lan
 ÂŸRº~
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2002
 ¥Á°ê91¦~6¤ë
39  "CMOS Low Noise Amplifiers"
 "CMOS§CÂø°T©ñ¤j¾¹"
 ±i®a¼í
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2002
 ¥Á°ê91¦~6¤ë
38  "Design and Application of a 1.25 Gb/s Clock and Data Recovery Circuit"
 "1.25 Gb/s®É¯ß¸ê®Æ¦^Âйq¸ô¤§³]­p»PÀ³¥Î"
 Ming-Shi Yu
 §E©ú¤h
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2002
 ¥Á°ê91¦~6¤ë
37  "Design of A PLL with Fast-Lock and Low Jitter"
 "¨ã§Ö³tÂê©w»P§C§Ý°ÊÂê¬Û°j¸ô¤§³]­p"
 °ª¤Ö¨¦
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2002
 ¥Á°ê91¦~6¤ë
36  "Design of CMOS DLL and 1.25Gb/s Data Recovery"
 "CMOS©µ¿ðÂê©w°j¸ô¤Î1.25Gb/s¸ê®Æ¦^´_¤§³]­p"
 Chih-Hao Sun
 ®]§Ó»¨
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2002
 ¥Á°ê91¦~6¤ë
35  "The Design and Implementation of Bandpass DS Modulators"
 "±a³q¤T¨¤¿n¤À½ÕÅܾ¹¤§³]­p»P»s§@"
 Hsiang-Hui Chang
 ±i´ð½÷
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2001
 ¥Á°ê90¦~6¤ë
34  "The Design and Implementation of Low-Pass Multibit Delta-Sigma Modulators"
 "§C³q¦h¦ì¤¸¤T¨¤¿n¤À½ÕÅܾ¹¤§³]­p»P»s§@"
 Tzu-Chien Hsueh
 Á§¤l«Ø
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2001
 ¥Á°ê90¦~6¤ë
33  "CMOS Delta-Sigma Magnetic to Digital Converters"
 "¤¬¸É¦¡ª÷®ñ¥bºÏ³õ¨ì¼Æ¦ìÂà´«¾¹¹B¥Î¤T¨¤¿n¤À½ÕÅÜ"
 Shr-Lung Chen
 ³¯¥KÀs
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2001
 ¥Á°ê90¦~6¤ë
32  "Design and Realization of COMS RF Frequency Synthesizers"
 "CMOS®gÀWÀW²v¦X¦¨¾¹¹q¸ô¤§³]­p»P»s§@"
 Chi-Kun Chiu
 ªôÄ~±X
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2001
 ¥Á°ê90¦~6¤ë
31  "2.4GHz CMOS RF Image-Reject Receiving Circuits"
 "2.4GHz CMOS®gÀWÃè¹³®ø°£±µ¦¬¹q¸ô¤§³]­p»P»s§@"
 Kun-Hsien Li
 §õ©[¾Ë
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2001
 ¥Á°ê90¦~6¤ë
30  "CMOS Miniature 3D Inductors and Low Noise Amplifier"
 "CMOS·L·P«¬¥ßÅé¹q·P¤Î§CÂø°T©ñ¤j¾¹¤§¬ã»s"
 Chia-Hsin Wu
 §d®aªY
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2001
 ¥Á°ê90¦~6¤ë
29  "Design and Realization of Analog Delay-Locked Loops"
 "Ãþ¤ñ¦¡©µ¿ðÂê©w°j¸ô¤§³]­p»P»s§@"
 Jyh-Woei Lin
 ªL§Ó°¶
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2001
 ¥Á°ê90¦~6¤ë
28  "The Design and Realization of Digital Calibration in 10-bit 10 MSPS Pipelined ADC"
 "10¦ì¤¸10MHz¾ÉºÞ¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹¼Æ¦ì®Õ¥¿¤èªk¤§¬ã»s"
 Shan-Chun Huang
 ¶Àµ½§g
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 Jan. 2001
 ¥Á°ê90¦~1¤ë
27  "The Design and Realization of Magnetic Sensor and its Readout Circuit"
 "ºÏ·P´ú¾¹¤ÎºÏ³õŪ¨ú¹q¸ô¤§³]­p»P»s§@"
 ¦ó¥ß¦w
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2000
 ¥Á°ê89¦~6¤ë
26  "CMOS RF Frequency Synthesizers with On-Chip LC-Tank Voltage-Controlled Oscillators"
 "¤¬¸É¦¡ª÷®ñ¥b®gÀWÀW²v¦X¦¨¾¹º[³æ´¹LCÀ£±±®¶Àú¾¹¤§³]­p»P»s§@"
 ·¨«Ø»Ê
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2000
 ¥Á°ê89¦~6¤ë
25  "A Tracking Data Recovery System for Inter-Chip Signaling"
 "À³¥Î©ó´¹¤ù¤¶­±«H¸¹¤§°lÂܦ¡¸ê®Æ¦^´_¨t²Î"
 ³¯©¾°¶
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2000
 ¥Á°ê89¦~6¤ë
24  "Design of CMOS Serial Links Using 4-PWM and 4-PAM Techniques"
 "À³¥Î¥|¶¥¯ßªi¼e«×½ÕÅÜ»P¥|¶¥¯ßªi®¶´T½ÕÅܤ§¤¬¸É¦¡ª÷®ñ¥b§Ç¦V¶Ç¿é¤§³]­p"
 ³¯°¶¥°
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2000
 ¥Á°ê89¦~6¤ë
23  "Design and Realization of 2.4GHz CMOS RF Front-end Receiving Circuits"
 "2.4GHz CMOS®gÀW«e¯Å±µ¦¬¹q¸ô¤§¬ã»s"
 ¶À¥HµÏ
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 2000
 ¥Á°ê89¦~6¤ë
22  "The Design and Realization of Folding and Interpolating A/D Converter"
 "ºPÅ|¤Î¤º´¡¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹¤§³]­p»P»s§@"
 Ming-Huang Liu
 ¼B»Ê®Ì
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1999
 ¥Á°ê88¦~6¤ë
21  "The Design and Implementation of a 10-bit Pipelined Analog-to-Disital Converter"
 "10¦ì¤¸¾ÉºÞ¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹¤§³]­p»P¹ê§@"
 ±d´¼³Í
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1999
 ¥Á°ê88¦~6¤ë
20  "The Design and Implementation of Sigma-Delta Modulators"
 "¿n¤À¤T¨¤½ÕÅܾ¹¤§³]­p»P¹ê§@"
 ±i¥ò»Ê
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1999
 ¥Á°ê88¦~6¤ë
19  "The design and Realization of Adaptive Coaxial Cable Equalizer"
 "¦P¶b¹qÆlµ¥¤Æ¾¹¤§³]­p»P»s§@"
 ³¯¥°©ö
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1999
 ¥Á°ê88¦~6¤ë
18  "Design and Application of CMOS PLL/DLL"
 "¤¬¸É¦¡ª÷®ñ¥bÂê¬Û°j¸ôº[©µ¿ðÂê©w°j¸ô¤§³]­p¤ÎÀ³¥Î"
 ³\®m»Ê
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1999
 ¥Á°ê88¦~6¤ë
17  "Research on Magnetic Micro Sensor and its Application"
 "ºÏ©Ê·L«¬·P´ú¾¹ªº¬ã¨s¤Î¨äÀ³¥Î"
 ÃQ´¼¦Æ
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1998
 ¥Á°ê87¦~6¤ë
16  "CMOS Micropower Bandgap Reference, Time Reference and Temperature Sensor"
 "¤¬¸É¦¡ª÷®ñ¥b³õ®Ä¹q´¹Å餧·L¥\²v¯à±a°Ñ¦Ò¹qÀ£,°Ñ¦Ò®É¶¡»P·Å«×·PÀ³¾¹"
 ±i§Ó¥Ð
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1998
 ¥Á°ê87¦~6¤ë
15  "The Design and Realization of 300MHz RF Front-end Receiving Circuits"
 "300MHz®gÀW«e¯Å±µ¦¬¹q¸ô¤§¬ã»s"
 ·¨¯¬­ì
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1998
 ¥Á°ê87¦~6¤ë
14  "Signal Processing Circuit For Capacitive Accelerometer"
 "¹q®e¦¡¥[³t«×­p¤§«H¸¹³B²z«H¸¹"
 ¶À·ù¯]
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1998
 ¥Á°ê87¦~6¤ë
13  "Laser Range Finder"
 "¹p®g´ú¶Z»ö"
 ÃQ¼Ý¥ú
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1997
 ¥Á°ê86¦~6¤ë
12  "The Design of Pipelined A/D Converter"
 "¾ÉºÞ¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹"
 ±i©[´¼
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1997
 ¥Á°ê86¦~6¤ë
11  "The Design and Realization of Pipelined Interpolating A/D Converter"
 "¾ÉºÞº[¤º´¡¦¡Ãþ¤ñ¼Æ¦ìÂà´«¾¹¤§³]­p»P»s§@"
 ¶À¹©³Ç
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1997
 ¥Á°ê86¦~6¤ë
10  "Analysis and Design of the All-Digital Phase-Locked Loop"
 "¥þ¼Æ¦ìÂê¬Û°j¸ô¤§¤ÀªR»P³]­p"
 ¾G¬°¥þ
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1997
 ¥Á°ê86¦~6¤ë
9  "The Single Chip Design and Applications of Dual-Modulus Scaling PLL Frequency Synthesizer"
 "Âù¼Ò¤ÀÀW¦¡Âê¬Û°j¸ôÀW²v¦X¦¨¾¹¤§³æ´¹¤ù³]­p¤ÎÀ³¥Î"
 Ching-Yuan Yang
 ·¨²M²W
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1996
 ¥Á°ê85¦~6¤ë
8  "The Design and Realization of CMOS Microsensor Circuit"
 "¤¬¸É¦¡ª÷®ñ¥b¾ÉÅé·L«¬·P´ú¾¹¹q¸ô¤§³]­p»P»s§@"
 ÃQ¤j¶v
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1996
 ¥Á°ê85¦~6¤ë
7  "Chip Realization of PLL-based Programmable Clock Generator"
 "°ò©óÂê¬Û°j¸ô¤§®É¯ß²£¥Í¾¹´¹¤ù»s§@"
 ªL§Ó¶¾
 
 Shen-Iuan Liu
 ¼B²`²W±Ð±Â
 June 1996
 ¥Á°ê85¦~6¤ë

 Co-Instructed

¡ô  Subject / ¬ã¨s¥DÃD  Author / §@ªÌ  Professor / «ü¾É±Ð±Â  Date / ¤é´Á
6  "The Realization of Audio Analog Memory Using Pulse Width Modulation Technique"
 "¨Ï¥Îªi¼e½ÕÅܧ޳Nªº­µÀWÃþ¤ñ°O¾ÐÅ餧»s§@"
 ªL¨|Þ³
 

 Hen-Wai Tsao
 ±ä«í°¶±Ð±Â

 Shen-Iuan Liu
 ¼B²`²W±Ð±Â

 June 1999
 ¥Á°ê88¦~6¤ë
5  "The Design and Realization of FSK Receiver IF Circuit"
 "FSK±µ¦¬¾÷¤¤ÀW¹q¸ô¤§¬ã»s"
 ¬x­Y®e
 

 Hen-Wai Tsao
 ±ä«í°¶±Ð±Â

 Shen-Iuan Liu
 ¼B²`²W±Ð±Â

 June 1999
 ¥Á°ê88¦~6¤ë
4  "The Design and Application of Bandpass Delta-Sigma Modulators"
 "±a³q¤T¨¤¿n¤À½ÕÅܾ¹ªº³]­p»PÀ³¥Î"
 Ruey-Yuan Tsai
 ½²·ç­ì

 Jingshown Wu
 §dÀR¶¯±Ð±Â

 Shen-Iuan Liu
 ¼B²`²W±Ð±Â

 June 1998
 ¥Á°ê87¦~6¤ë
3  "The Design and Realization of GFSK Transmitter"
 "°ª´µÀW²vÁä²¾¶Ç¿é¾÷¤§¬ã»s"
 Chung-Pang Yu
 ´å©vº]

 Hen-Wai Tsao
 ±ä«í°¶±Ð±Â

 Shen-Iuan Liu
 ¼B²`²W±Ð±Â

 June 1997
 ¥Á°ê86¦~6¤ë
2  "The Study of CMOS Linear and Nonlinear Analog Integrated Circuits"
 "CMOS ½u©Ê»P«D½u©ÊÃþ¤ñ¿nÅé¹q¸ô¤§¬ã¨s"
 ¬I©¾«H
 

 Ming-Bo Lin
 ªL»Êªi±Ð±Â

 Shen-Iuan Liu
 ¼B²`²W±Ð±Â

 June 1995
 ¥Á°ê84¦~6¤ë
1  "The Study of CMOS and BiCMOS Analog Multipliers"
 "CMOS »P BiCMOS Ãþ¤ñ­¼ªk¾¹¤§¬ã¨s"
 ±i¥¿ªN
 

 Ming-Bo Lin
 ªL»Êªi±Ð±Â

 Shen-Iuan Liu
 ¼B²`²W±Ð±Â

 June 1995
 ¥Á°ê84¦~6¤ë

 

 

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