|
Date |
Notes / Slides |
Assignments |
Notes |
|
09/12/2013
09/13/2013 |
§1Introduction, Number Systems and Conversion
(unit00, unit01)
§2 Boolean Algebra (unit02), §3 Boolean Algebra (Continued) |
HW1
assigned §1~§2 (due 10/4 before lecture)
|
|
|
09/19/2013
09/20/2013 |
Mid-Autumn Festival
Mid-Autumn Festival |
|
|
|
09/26/2013
09/27/2013 |
§3 Boolean Algebra (Continued) (unit03), §4 Applications of Boolean Algebra (unit04)
§4 Applications of Boolean Algebra, §5 Karnaugh Maps (unit05) |
HW2
assigned §3~§4 (due 10/11 before lecture)
|
9/26 additional makeup lecture (13:20-14:10 same room)
9/27 additional makeup lectures (17:30-19:20 same room)
|
|
10/03/2013
10/04/2013 |
(TA holds office hour in
class)
(TA holds office hour in
class) |
|
(10/03, 10/04 Prof. Jiang out of country) |
|
10/10/2013
10/11/2013 |
National Day
§5 Karnaugh Maps, §7 Multi-Level Gate Circuits (unit07) |
HW3
assigned §5, §7 (due 10/25 before lecture)
|
10/11
additional makeup lecture (17:30-18:20 same room) |
|
10/17/2013
10/18/2013 |
Quiz
1 (§1~§4)
§7 Multi-Level Gate Circuits |
|
10/18
additional makeup lecture (17:30-18:20 same room) |
|
10/24/2013
10/25/2013 |
§8 Combinational Circuit Design (skip §8.1 and §8.2) (unit08)
§9 Multiplexers, Decoders, and Programmable Logic Devices (skip §9.7) (unit09) |
HW4 assigned
§8~§9 (due 11/8
before exam)
|
10/24 additional makeup lecture (13:20-14:10
same room)
|
|
10/31/2013
11/01/2013 |
§9 Multiplexers, Decoders, and Programmable Logic Devices (skip §9.7)
Verilog: Combinational Circuits
(15:30~18:00, by TA) |
|
|
|
11/07/2013
11/08/2013 |
No Lecture
Midterm Exam (§1~§9) |
|
|
|
11/14/2013
11/15/2013 |
§11 Latches and Flip-Flops (unit11)
University Anniversary (No Lecture) |
|
11/14
additional makeup lecture (13:20-14:10 same room) |
|
11/21/2013
11/22/2013 |
(TA holds office hour in
class)
(TA holds office hour in
class) |
HW5 assigned
§11~§12 with Verilog lab questions
(due 12/6 before lecture)
|
(11/21, 11/22
Prof. Jiang out of country)
|
|
11/28/2013
11/29/2013 |
§11 Latches and Flip-Flops, §12 Registers and Counters (unit12)
§13 Analysis of Clocked Sequential Circuits (unit13) |
|
11/28
additional makeup lecture (13:20-14:10 same room)
11/29 additional makeup lectures (17:30-18:20 same room)
|
|
12/05/2013
12/06/2013 |
§13 Analysis of Clocked Sequential Circuits
§14 Derivation of State Graphs and Tables (skip Examples 2, 3 of §14.3) (unit14) |
HW6 assigned §13~§14 (due 12/20
before lecture)
|
|
|
12/12/2013
12/13/2013 |
Quiz
2 (§11~§13)
§15 Reduction of State Tables (§15.1 ~ §15.2) (unit15) |
|
|
|
12/19/2013
12/20/2013 |
§15 Reduction of State Tables (§15.1 ~ §15.2)
§16 Sequential Circuit Design (§16.1 ~ §16.4) (unit16) |
HW7 assigned §15~§16 (due 1/3
before lecture)
|
|
|
12/26/2013
12/27/2013 |
§16 Sequential Circuit Design (§16.1 ~ §16.4)
§18 Circuits for Arithmetic Operations (§18.1 ~ §18.2) (unit18) |
|
|
|
01/02/2014
01/03/2014 |
§18 Circuits for Arithmetic Operations (§18.1 ~ §18.2)
Supplementary Materials |
|
|
|
01/09/2014
01/10/2014 |
No Lecture
Final Exam |
|
final exam score announced (1/14) |