Logic Synthesis and Verification


Fall 2013

Introduction Announcements Lectures Readings Administrations Links


Slides
Assignments




Date Slides Problem Sets Solutions Projects
09/11/2013 Introduction (PDF-2, PDF-4); Boolean Algebra (PDF-2, PDF-4) --- ---
09/18/2013 ABC Tutorial (PDF-2, PDF-4; supplement) Programming Assignment 1  (PDF) ---
09/25/2013 Representations of Boolean Functions (PDF-2, PDF-4; handout Section 2) Homework 1 (PDF) Solution 1 (PDF)
10/02/2013 no lecture --- --- ---
10/09/2013 Representations of Boolean Functions (handout Section 2) --- ---
10/15/2013 makeup lecture Representations of Boolean Functions (SAT slides) Homework 2 (PDF) Solution 2 (PDF)
10/16/2013 SOPs and Incompletely Specified Functions (PDF-2, PDF-4) --- ---
10/23/2013 Two-Level Logic Minimization (I)  (PDF-2, PDF-4; handout Sections 3.1~3.2)   --- --- Topic Announcement
10/30/2013 Two-Level Logic Minimization (II)   (PDF-2, PDF-4) Homework 3 (PDF) Solution 3 (PDF)
11/06/2013 Two-Level Logic Minimization (II) --- --- Proposal Due
11/13/2013 Multi-Level Logic Minimization (PDF-2, PDF-4; handout Section 3.3) --- ---
11/20/2013 Midterm Exam (New Schedule) Programming Assignment 2 (PDF) ---
11/27/2013 Multi-Level Logic Minimization Homework 4 (PDF) Solution 4 (PDF) Progress Report Due
12/04/2013 Node Minimization Using Don't Cares (PDF-2, PDF-4; handout Section 3.4) --- ---
12/11/2013 Technology Mapping (PDF-2, PDF-4; handout Section 4) Homework 5 (PDF) Solution 5 (PDF)
12/18/2013 Timing Analysis and Optimization (PDF-2, PDF-4; handout Sections 5~6) --- --- Progress Report Due
12/25/2013 Sequential Circuit Optimization (PDF-2, PDF-4);  Equivalence and Property Checking (PDF-2, PDF-4) Homework 6 (PDF) Solution 6 (PDF)
01/01/2014 Happy New Year --- ---
01/08/2014 Project Presentation --- --- Final Report Due (01/15)