|
Date |
Slides |
Problem Sets |
Solutions |
Projects |
| 09/12/2012 |
Introduction (PDF-2,
PDF-4); Boolean Algebra (PDF-2,
PDF-4) |
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--- |
|
| 09/19/2012 |
ABC Tutorial (PDF-2,
PDF-4) |
Programming
Assignment 1 (pa1) |
--- |
|
| 09/26/2012 |
Representations of Boolean
Functions (PDF-2,
PDF-4; handout
Section 2) |
Homework 1
(hw1) |
Solution 1
(sol1) |
|
| 10/03/2012 |
Representations of Boolean Functions (handout
Section 2) |
--- |
--- |
|
| 10/10/2012 |
National Day |
--- |
--- |
¡@ |
| 10/17/2012 |
Representations of Boolean Functions (supplement) |
Homework 2
(hw2) |
Solution 2
(sol2) |
Topic
Announcement |
| 10/24/2012 |
SOPs and Incompletely Specified
Functions (PDF-2,
PDF-4) |
--- |
--- |
|
| 10/31/2012 |
Two-Level Logic Minimization (I) (PDF-2,
PDF-4; handout
Sections 3.1~3.2) |
Homework 3
(hw3) |
Solution 3
(sol3) |
¡@ |
| 11/07/2012 |
Midterm Exam |
Programming
Assignment 2 (pa2) |
--- |
Proposal
Due |
| 11/14/2012 |
Two-Level Logic Minimization (II) (PDF-2,
PDF-4) |
Homework 4
(hw4) |
Solution 4
(sol4) |
|
| 11/21/2012 |
Multi-Level Logic Minimization (PDF-2,
PDF-4; handout
Section 3.3) |
--- |
--- |
|
| 11/28/2012 |
Multi-Level Logic Minimization (handout
Section 3.3) |
--- |
--- |
|
| 12/05/2012 |
Node Minimization Using Don't Cares (PDF-2,
PDF-4; handout
Section 3.4) |
Homework 5
(hw5) |
Solution 5
(sol5) |
Progress
Report Due |
| 12/12/2012 |
Technology Mapping (PDF-2,
PDF-4; handout
Section 4) |
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--- |
|
| 12/19/2012 |
Timing Analysis and Optimization (PDF-2,
PDF-4; handout
Sections 5~6) |
--- |
--- |
|
| 12/26/2012 |
Sequential Circuit Optimization (PDF-2,
PDF-4) |
Homework 6
(hw6) |
Solution 6 |
|
| 01/02/2013 |
Equivalence and Property Checking (PDF-2,
PDF-4) |
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--- |
|
| 01/09/2013 |
Project Presentation |
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--- |
Final
Report Due (01/16) |