Jri
Lee, "mm-Wave Silicon
Technology: 60GHz and Beyond (Chapter 5: Voltage-Controlled Oscillators and Frequency Dividers)". 著作＆專利
書籍/章節
Jri
Lee, "mm-Wave Silicon
Technology: 60GHz and Beyond (Chapter 5: Voltage-Controlled Oscillators and Frequency Dividers)".
Jri Lee, "Communication Integrated Circuits." PDF
會議論文
P. Peng, J. Li, L. Chen, and Jri Lee, "A 56Gb/s PAM-4/NRZ Transceiver in 40nm CMOS," Digest of International Solid-State Circuits Conference, pp.110-111, Feb. 2017. PDF
L. Chen, P. Peng, C. Kao, Y. Chen, and Jri Lee, "CW/FMCW/Pulse Radar Engines for 24/26GHz Multi-Standard Applications in 65nm CMOS," Digest of Asian Solid-State Circuits Conference, 2015. PDF
G. Chen, C. Wu, C. Lin, H. Hung and Jri Lee, "Fully-integrated 40-Gb/s Pulse Pattern Generator and Bit-Error-Rate Tester Chipsets in 65-nm CMOS technology," Digest of Asian Solid-State Circuits Conference, pp. 109-112, Nov. 2014. PDF
P. Chiang, H. Hung, H. Chu, G. Chen, and Jri Lee, "60Gb/s NRZ and PAM4 Transmitters for 400GbE in 65nm CMOS," Digest of International Solid-State Circuits Conference, pp.42-43, Feb. 2014. PDF
P. Chen, P. Peng, C. Kao, Y. Chen, and Jri Lee, "A 94GHz 3D Image Radar Engine with 4TX/4RX Beamforming Scan Technique in 65nm CMOS," Digest of International Solid-State Circuits Conference, pp. 146-147, Feb. 2013. PDF J. Jiang, P. Chiang, H. Hung, C. Lin, T. Yoon, and Jri Lee, "100Gb/s Ethernet Chipsets in 65nm CMOS Technology," Digest of International Solid-State Circuits Conference, pp. 120-121, Feb. 2013. PDF
S. Huang, Y. Yeh, H. Wang, P. Chen, and Jri
Lee, "An 87GHz QPSK Transceiver with Costas-Loop Carrier Recovery in 65nm CMOS," Digest of International Solid-State Circuits Conference, pp. 168-169, Feb. 2011. PDF M. Chen, Y. Shih, C. Lin, H. Hung, and Jri
Lee, "A 40Gb/s TX and RX Chip Set in 65nm CMOS," Digest of International Solid-State Circuits Conference, pp. 146-147, Feb. 2011. PDF
Y. Li, M. Hung, S. Huang, and Jri
Lee, "A Fully-Integrated 77GHz FMCW Radar System in 65nm CMOS," Digest of International Solid-State Circuits Conference, pp. 216-217, Feb. 2010. PDF K. Wu and Jri
Lee, "A 2×25Gb/s Deserializer with 2:5 DMUX for 100Gb/s Ethernet Applications," Digest of International Solid-State Circuits Conference, pp. 374-375, Feb. 2010. PDF Jri
Lee and K. Wu, "A 20Gb/s Full-Rate Linear CDR Circuit with Automatic Frequency Acquisition," Digest of International Solid-State Circuits Conference, pp. 366-367, Feb. 2009. PDF Jri
Lee, Y. Huang, Y. Chen, H. Lu, and C. Chang, "A Low-Power Fully Integrated 60GHz Transceiver System with OOK Modulation and On-Board Antenna Assembly," Digest of International Solid-State Circuits Conference, pp. 316-317, Feb. 2009. PDF Jri
Lee, H. Wang, W. Chen, and Y. Lee, "Subharmonically Injection-Locked PLLs for Ultra-Low-Noise Clock Generation," Digest of International Solid-State Circuits Conference, pp. 92-93, Feb. 2009. PDF Y. Lien and Jri Lee, "A 6-b 1-GS/s 30-mW ADC in 90-nm CMOS technology," Digest of Asian Solid-State Circuits Conference, pp. 45-48, Nov. 2008. PDF Jri Lee, M. Chen, and H. Wang, "A 20-Gb/s Duobinary Transceiver in 90-nm CMOS," Digest of International Solid-State Circuits
Conference, pp. 102-103, Feb. 2008. PDF Jri Lee and M. Liu, "A 20Gb/s Burst-Mode CDR Circuit Using Injection-Locking Technique," Digest of International Solid-State Circuits Conference, pp. 46-47, Feb. 2007. PDF
Jri
Lee, "A 75-GHz PLL in 90-nm CMOS Technology," Digest of International Solid-State Circuits
Conference, pp. 432-433, Feb. 2007. PDF
Jri
Lee and
Huaide Wang, "A 20-Gb/s Broadband Transmitter with Auto-Configuration
Technique," Digest of International Solid-State Circuits Conference,
pp. 444-445, Feb. 2007. PDF
期刊論文
專利 Jri Lee,
Pen-Jui Peng and Pang-Ning Chen, “Radio frequency transmitting device and radio frequency receiving device,” U.S. Patent No. 9,154,167. Jri Lee,
Ming-Shuan Chen and Huai-De Wang, “Duobinary Transceiver,” U.S. Patent
No. 8,416,840.
Jri Lee,
Yenlin Huang, Yentso Chen and Chiajung Chang, “Wireless radio frequency signal transceiving system,” U.S. Patent No. 8,385,456.
Jri Lee
and Kechung Wu, “Clock and Data Recovery Circuits,” U.S. Patent No. 8,284,885.
Jri Lee
and Mingchung Liu, “Phase Locked Loop and 3-stage Frequency Divider,” U.S.
Patent No. 8,207,794. Jri Lee
and Mingchung Liu, “Phase Locked Loop and Phase Frequency Detector,” U.S. Patent
No. 8,207,792. Jri Lee
and Mingchung Liu, “Phase
Locked Loop, Voltage Controlled Oscillator, and Phase-frequency Detector,” U.S.
Patent No. 7,830,212. Jri Lee
and Behzad Razavi, “High-speed clock and data recovery circuit,” U.S. Patent No. 7,286,625.
Jri Lee
and Kechung Wu, “Clock and Data Recovery Circuits,” TW Patent No. I398,151 . Jri Lee,
Yenlin Huang, Yentso Chen and Chiajung Chang,
“Differential radio frequency signal transmitter and receiver and wireless radio frequency signal transceiver system,” TW Patent No. I384,814. Jri Lee,
Mingshuan Chen and Huaide Wang, “Duobinary Transceiver,” TW Patent No. I383,599.
Jri Lee, P. Chiang, and C. Weng, "56Gb/s PAM4 and NRZ SerDes Transceivers in 40nm CMOS," Digest of Symposium on VLSI Circuits, pp. C118-C119, June 2015. PDF
P. Peng, C. Kao, C. Wu, and Jri Lee, "A 79-GHz Bidirectional Pulse Radar System with Injection-Regenerative Receiver in 65 nm CMOS," IEEE Radio Frequency Integrated Circuit Symposium, pp. 303-306, June 2014. PDF
Y. Chen, C. Kao, P. Peng, and Jri Lee, "A 94GHz Duobinary Keying Wireless Transceiver in 65nm CMOS," Digest of Symposium on VLSI Circuits, pp. 125-126, June 2014. PDF
S. Huang, Y. Chen, H. Chu, P. Chen, H. Chang, C. Kuo, C. Kao, and Jri Lee, "A Fully-Integrated 77GHz Phase-Array Radar System with 1TX/4RX Frontend and Digital Beamforming Technique," Digest of Symposium on VLSI Circuits, pp. 294-295, June 2013. PDF
W. Lee, K. Wu, J. Jiang, and Jri Lee, "A Laser Ranging Radar Transceiver with Modulated Evaluation Clock in 65nm CMOS Technology," Digest of Symposium on VLSI Circuits, pp. 286-287, June 2011. PDF
H. Wang, M. Hung, Y. Yeh, and Jri Lee, "A 60-GHz FSK Transceiver with Automatically-Calibrated Demodulator in 90-nm CMOS," Digest of Symposium on VLSI Circuits, pp. 95-96, June 2010. PDF
H. Wang and Jri Lee, "A 40-Gb/s Transmitter with 4:1 MUX and Subharmonically Injection-Locked CMU in 90-nm CMOS Technology," Digest of Symposium on VLSI Circuits, pp. 48-49, June 2009. PDF
H. Wang, C. Lee, A. Lee, and Jri Lee, "A 21-Gb/s 87-mW Transceiver with FFE/DFE/Linear Equalizer in 65-nm CMOS Technology," Digest of Symposium on VLSI Circuits, pp. 50-51, June 2009. PDF
Jri
Lee, "A 20-Gb/s
Adaptive Equalizer in 0.13-μm
CMOS Technology," Digest of International Solid-State Circuits Conference,
pp. 92-93, Feb. 2006. PDF
Jri
Lee, Jian-yu Ding,
and Duan-yi Cheng, "A 20-Gb/s 2-to-1 MUX and a 40-GHz VCO in 0.18-μm
CMOS Technology," Digest of Symposium on VLSI Circuits, pp. 136-139,
June 2005. PDFJri
Lee and Shanghann
Wu, "Design and Analysis of a 20-GHz Clock Multiplication Unit in 0.18-μm
CMOS Technology," Digest of Symposium on VLSI Circuits, pp. 140-143,
June 2005. PDFJri
Lee and Da-wei Chiu,
"A 7-Band 3-8 GHz Frequency Synthesizer with 1ns Band-Switching Time in
0.18-μm
CMOS Technology," Digest of International Solid-State Circuits Conference,
pp. 204-205, Feb. 2005. PDFSrikanth
Gondi, Jri Lee and Behzad Razavi,
"A 10Gb/s CMOS Adaptive Equalizer for Backplane Applications," Digest
of International Solid-State Circuits Conference, pp. 328-329, Feb. 2005.
PDF
Jri
Lee, Ken Kundert and Behzad Razavi, "Modeling of Jitter
in Bang-Bang Clock and Data Recovery Circuits," Custom Integrated Circuits
Conference Proceedings, pp. 711-714, Sept. 2003. PDF
Jri
Lee and Behzad Razavi, "A 40-GHz Frequency Divider in 0.18-μm
CMOS Technology," Digest of Symposium on VLSI Circuits, pp. 259-262,
June 2003. PDFJri
Lee and Behzad Razavi, "A 40-Gb/s Clock and Data Recovery
Circuit in 0.18-μm CMOS Technology," Digest
of International Solid-State Circuits Conference, pp. 242-243, Feb. 2003.
PDF 
Jri Lee, P. Chiang, P. Peng, L. Chen, and C. Weng, "Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies," IEEE Journal of Solid-State Circuits, vol. 50, pp. 2061-2073, Sep. 2015.
PDF
P. Peng, P. Chen, C. Kao, Y. Chen,
and Jri
Lee, "A 94 GHz 3D Image Radar Engine With 4TX/4RX Beamforming Scan Technique in 65 nm CMOS Technology," IEEE Journal of Solid-State Circuits, vol. 50, pp. 656-668, Mar. 2015.
PDF
P. Chiang, J. Jiang, H. Hung, C. Wu, G. Chen,
and Jri
Lee, "4×25 Gb/s Transceiver With Optical Front-end for 100 GbE System in 65 nm CMOS Technology," IEEE Journal of Solid-State Circuits, vol. 50, pp. 573-585, Feb. 2015.
PDF
M. Chen, Y. Shih, C. Lin, H. Hung,
and Jri
Lee, "A Fully-Integrated 40-Gb/s Transceiver in 65-nm CMOS Technology," IEEE Journal
of Solid-State Circuits, vol. 47, pp. 627-640, Mar. 2012.
PDF
S. Huang, Y. Yeh, H. Wang, P. Chen,Jri
Lee,
Y. Li, M. Hung, and S. Huang, "A
Fully-Integrated 77-GHz FMCW Radar Transceiver in 65-nm CMOS Technology," IEEE Journal
of Solid-State Circuits, vol. 45, pp. 2746-2756, Dec. 2010.
PDFK.
Wu
and Jri
Lee, "A 2 x 25-Gb/s Receiver With 2:5 DMUX for 100-Gb/s Ethernet," IEEE Journal
of Solid-State Circuits, vol. 45, pp. 2421-2432, Nov. 2010.
PDFH. Wang and Jri
Lee, "A 21-Gb/s 87-mW Transceiver with FFE/DFE/Analog Equalizer in 65-nm CMOS Technology," IEEE Journal
of Solid-State Circuits, vol. 45, pp. 909-920, Apr. 2010.
PDFJri
Lee, Y. Chen, and Y. Huang, "A Low-Power Low-Cost Fully-Integrated 60-GHz Transceiver System With OOK Modulation and On-Board Antenna Assembly," IEEE Journal
of Solid-State Circuits, vol. 45, pp. 264-275, Feb. 2010.
PDFJri
Lee and K. Wu, "A 20-Gb/s Full-Rate Linear Clock and Data Recovery Circuit With Automatic Frequency Acquisition," IEEE Journal
of Solid-State Circuits, vol. 44, pp. 3590-3602, Dec. 2009.
PDFJri
Lee and H. Wang, "Study of Subharmonically Injection-Locked PLLs," IEEE Journal
of Solid-State Circuits, vol. 44, pp. 1539-1553, May 2009.
PDFJri
Lee, M.
Chen, and H. Wang, "Design and Comparison of Three 20-Gb/s Backplane
Transceivers for Duobinary, PAM4, and NRZ Data," IEEE Journal
of Solid-State Circuits, vol. 43, pp. 2120-2133, Sept. 2008.
PDFJri
Lee, M. Liu,
and H. Wang, "A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology," IEEE Journal
of Solid-State Circuits, vol. 43, pp. 1414-1426, June 2008.
PDFJri
Lee and
M. Liu, "A 20-Gb/s Burst-Mode Clock and Data Recovery Circuit Using
Injection-Locking Technique," IEEE Journal of Solid-State Circuits, vol. 43,
pp. 619-630, Mar. 2008.
PDFJri
Lee, "A 20-Gb/s Adaptive Equalizer in 0.13-μm
CMOS Technology," IEEE Journal of Solid-State Circuits, vol. 41,
pp. 2058-2066, Sept. 2006. PDFJri
Lee, "High-Speed Circuit Designs for Transmitters in Broadband
Data Links," IEEE Journal of Solid-State Circuits, vol. 41, pp.
1004-1015, May 2006. PDFJri
Lee, "A 3-to-8-GHz Fast Hopping Frequency Synthesizer in
0.18-μm CMOS Technology," IEEE
Journal of Solid-State Circuits, vol. 41, pp. 566-573, March 2006.
PDFJri
Lee, Ken Kundert and Behzad Razavi, "Analysis and Modeling
of Bang-Bang Clock and Data Recovery Circuits," IEEE Journal of Solid-State
Circuits, vol. 39, pp. 1571-1580, Sept. 2004. PDFJri
Lee and Behzad Razavi, "A 40-GHz Frequency Divider in 0.18-μm
CMOS Technology," IEEE Journal of Solid-State Circuits, vol. 39,
pp. 594-601, April 2004. PDFJri
Lee and Behzad Razavi, "A 40-Gb/s Clock and Data Recovery
Circuit in 0.18-μm CMOS Technology,"
IEEE Journal of Solid-State Circuits, vol. 38, pp. 2181-2190, Dec. 2003.
PDF
Andrew Kung and Jri Lee, "Efficient
frequency conversion apparatus for use with multimode solid-state lasers," U.S. Patent No. 6,005,878.
Jri Lee and Huaide Wang, ”Signal Generating Circuit,” TW Patent No. I380,597.
Jri Lee and Mingchung Liu, “Phase Locked Loop, Voltage Controlled Oscillator, and Phase-frequency Detector,” TW Patent No. I357,722.